公开(公告)号：US20220059341A1

公开(公告)日：2022-02-24

申请号：US17518894

申请日：2021-11-04

申请人： Qromis, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Shari Farrens

IPC分类号： H01L21/02 ,  H01L33/00 ,  H01L21/84 ,  H01L27/12 ,  H01L33/02 ,  C23C16/40 ,  C23C16/50 ,  C23C16/56 ,  C30B29/06 ,  C30B29/40

摘要： An engineered substrate structure includes a ceramic substrate having a front surface characterized by a plurality of peaks. The ceramic substrate includes a polycrystalline material. The engineered substrate structure also includes a planarization layer comprising a planarization layer material and coupled to the front surface of the ceramic substrate. The planarization layer defines fill regions filled with the planarization layer material between adjacent peaks of the plurality of peaks on the front surface of the ceramic substrate. The engineered substrate structure further includes a barrier shell encapsulating the ceramic substrate and the planarization layer, wherein the barrier shell has a front side and a back side, a bonding layer coupled to the front side of the barrier shell, a single crystal layer coupled to the bonding layer, and a conductive layer coupled to the back side of the barrier shell.

公开(公告)号：US20200335418A1

公开(公告)日：2020-10-22

申请号：US16914026

申请日：2020-06-26

申请人： QROMIS, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Shari Farrens ,  Ozgur Aktas

IPC分类号： H01L23/373 ,  H01L21/02 ,  H01L23/66 ,  H01L29/20 ,  H01L29/78 ,  H01L25/16 ,  H01L33/32 ,  H01L33/64 ,  H01P1/30 ,  H01P3/00 ,  H03H9/02 ,  B81B3/00

摘要： An electronic device includes a support structure comprising a polycrystalline ceramic core, a first adhesion layer coupled to the polycrystalline ceramic core, a conductive layer coupled to the first adhesion layer, a second adhesion layer coupled to the conductive layer, and a barrier layer coupled to the second adhesion layer. The electronic device also includes a buffer layer coupled to the support structure, a contact layer coupled to the buffer layer, and a field-effect transistor (FET) coupled to the contact layer.

公开(公告)号：US20200212214A1

公开(公告)日：2020-07-02

申请号：US16812120

申请日：2020-03-06

申请人： QROMIS, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Ozgur Aktas

IPC分类号： H01L29/778 ,  H01L21/762 ,  H01L29/40 ,  H01L23/66 ,  H01L23/373 ,  H01L21/02 ,  H01L29/66 ,  H01L29/417

摘要： A substrate for RF devices includes a polycrystalline ceramic core and an interlayer structure. The interlayer structure includes a first silicon oxide layer coupled to the polycrystalline ceramic core, a polysilicon layer coupled to the first silicon oxide layer, a second silicon oxide layer coupled to the polysilicon layer, a barrier layer coupled to the second silicon oxide layer, a third silicon oxide layer coupled to the barrier layer, and a substantially single crystalline silicon layer coupled to the third silicon oxide layer.

公开(公告)号：US10566190B2

公开(公告)日：2020-02-18

申请号：US16161853

申请日：2018-10-16

申请人： QROMIS, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Shari Farrens

IPC分类号： H01L21/02 ,  H01L33/00 ,  C23C16/50 ,  H01L21/84 ,  H01L27/12 ,  H01L33/02 ,  C23C16/40 ,  C23C16/56 ,  C30B29/06 ,  C30B29/40

摘要： A method of fabricating a ceramic substrate structure includes providing a ceramic substrate, encapsulating the ceramic substrate in a barrier layer, and forming a bonding layer coupled to the barrier layer. The method further includes removing a portion of the bonding layer to expose at least a portion of the barrier layer and define fill regions, and depositing a second bonding layer on the at least a portion of the exposed barrier layer and the fill regions.

公开(公告)号：US10535547B2

公开(公告)日：2020-01-14

申请号：US16213512

申请日：2018-12-07

申请人： QROMIS, Inc.

发明人： Vladimir Odnoblyudov ,  Dilip Risbud ,  Ozgur Aktas ,  Cem Basceri

IPC分类号： H01L21/762 ,  H01L21/683 ,  H01L29/778 ,  H01L29/861 ,  H01L21/02 ,  H01L21/28 ,  H01L21/48 ,  H01L29/10 ,  H01L29/20 ,  H01L29/205 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  C30B25/18 ,  C30B29/06 ,  C30B29/40 ,  H01L29/872 ,  H01L29/40

摘要： A semiconductor diode includes an engineered substrate including a substantially single crystal layer, a buffer layer coupled to the substantially single crystal layer, and a semi-insulating layer coupled to the buffer layer. The semiconductor diode also includes a first N-type gallium nitride layer coupled to the semi-insulating layer and a second N-type gallium nitride layer coupled to the first N-type gallium nitride layer. The first N-type gallium nitride layer has a first doping concentration and the second N-type gallium nitride layer has a second doping concentration less than the first doping concentration. The semiconductor diode further includes a P-type gallium nitride layer coupled to the second N-type gallium nitride layer, an anode contact coupled to the P-type gallium nitride layer, and a cathode contact coupled to a portion of the first N-type gallium nitride layer.

公开(公告)号：US20190252186A1

公开(公告)日：2019-08-15

申请号：US16271704

申请日：2019-02-08

申请人： QROMIS, Inc.

发明人： Ozgur Aktas ,  Vladimir Odnoblyudov ,  Cem Basceri

IPC分类号： H01L21/02 ,  H01L29/06 ,  H01L29/20 ,  H01L29/205 ,  H01L29/207 ,  H01L29/66

摘要： A method of forming doped regions by diffusion in gallium nitride materials includes providing a substrate structure including a gallium nitride layer and forming a mask on the gallium nitride layer. The mask exposes one or more portions of a top surface of the gallium nitride layer. The method also includes depositing a magnesium-containing gallium nitride layer on the one or more portions of the top surface of the gallium nitride layer and concurrently with depositing the magnesium-containing gallium nitride layer, forming one or more magnesium-doped regions in the gallium nitride layer by diffusing magnesium into the gallium nitride layer through the one or more portions. The magnesium-containing gallium nitride layer provides a source of magnesium dopants. The method further includes removing the magnesium-containing gallium nitride layer and removing the mask.

公开(公告)号：US10347794B2

公开(公告)日：2019-07-09

申请号：US14690154

申请日：2015-04-17

申请人： QROMIS, Inc.

发明人： Anthony Lochtefeld ,  Hugues Marchand

IPC分类号： H01L33/00 ,  H01L33/48 ,  C30B29/06 ,  C30B33/10 ,  H01L21/02 ,  H01L33/32 ,  H01L33/16 ,  H01S5/323

摘要： Gallium nitride wafer substrate for solid state lighting devices, and associated systems and methods. A method for making an SSL device substrate in accordance with one embodiment of the disclosure includes forming multiple crystals carried by a support member, with the crystals having an orientation selected to facilitate formation of gallium nitride. The method can further include forming a volume of gallium nitride carried by the crystals, with the selected orientation of the crystals at least partially controlling a crystal orientation of the gallium nitride, and without bonding the gallium nitride, as a unit, to the support member. In other embodiments, the number of crystals can be increased by a process that includes annealing a region in which the crystals are present, etching the region to remove crystals having an orientation other than the selected orientation, and/or growing the crystals having the selected orientation.

公开(公告)号：US20180261488A1

公开(公告)日：2018-09-13

申请号：US15974606

申请日：2018-05-08

申请人： QROMIS, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri

IPC分类号： H01L21/683 ,  H01L33/00

CPC分类号： H01L21/6835 ,  H01L21/76251 ,  H01L21/7813 ,  H01L33/00 ,  H01L33/08 ,  H01L33/20 ,  H01L33/382 ,  H01L33/50 ,  H01L2221/6835 ,  H01L2221/68381

摘要： A method of processing an engineered substrate structure includes providing an engineered substrate structure including a polycrystalline substrate and an engineered layer encapsulating the polycrystalline substrate, forming a sacrificial layer coupled to the engineered layer, joining a solid state device structure to the sacrificial layer, forming one or more channels in the solid state device structure by removing one or more portions of the solid state device structure to expose one or more portions of the sacrificial layer, flowing an etching chemical through the one or more channels to the one or more exposed portions of the sacrificial layer, and dissolving the sacrificial layer by interaction between the etching chemical and the sacrificial layer, thereby separating the engineered substrate structure from the solid state device structure.

公开(公告)号：US11328927B2

公开(公告)日：2022-05-10

申请号：US16525345

申请日：2019-07-29

申请人： QROMIS, Inc.

发明人： Vladimir Odnoblyudov ,  Cem Basceri ,  Shari Farrens ,  Ozgur Aktas

IPC分类号： H01L21/02 ,  C30B29/40 ,  H01L21/8252 ,  H01L21/8238 ,  H01L29/20 ,  H01L29/16 ,  H01L27/06 ,  H01L27/092 ,  H01L23/522 ,  C30B25/18 ,  C30B29/06 ,  H01L21/8258 ,  H01L21/762

摘要： A method of fabricating a semiconductor structure includes providing an engineered substrate including a polycrystalline substrate, a barrier layer encapsulating the polycrystalline substrate, and a bonding layer coupled to the barrier layer. The method further includes forming a first silicon layer coupled to the bonding layer, forming a dielectric layer coupled to the first silicon layer, forming a second silicon layer coupled to the dielectric layer, removing a portion of the second silicon layer and a corresponding portion of the dielectric layer to expose a portion of the first silicon layer, forming a gallium nitride (GaN) layer coupled to the exposed portion of the first silicon layer, forming a gallium nitride (GaN) based device coupled to the GaN layer, and forming a silicon-based device coupled to a remaining portion of the second silicon layer.

公开(公告)号：US20220115340A1

公开(公告)日：2022-04-14

申请号：US17501603

申请日：2021-10-14

申请人： Qromis, Inc.

发明人： Ozgur Aktas ,  Vladimir Odnoblyudov ,  Cem Basceri

IPC分类号： H01L23/66 ,  H01L29/20 ,  H01L27/06 ,  H01L23/367 ,  H01L23/528 ,  H01L21/48 ,  H01L21/78 ,  H01L21/8252

摘要： A monolithic microwave integrated circuit (MMIC) system includes a growth substrate, a device layer coupled to the growth substrate, a plurality of MMIC device elements coupled to the device layer, and a plurality of metallization structures coupled to the plurality of MMIC device elements. The MMIC system also includes a carrier substrate coupled to the plurality of metallization structures and a cooling structure coupled to the carrier substrate.