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    INSULATED GATE BIPOLAR TRANSISTOR FAILURE MODE DETECTION AND PROTECTION SYSTEM AND METHOD
    1.
    发明申请
    INSULATED GATE BIPOLAR TRANSISTOR FAILURE MODE DETECTION AND PROTECTION SYSTEM AND METHOD 有权
    绝缘栅双极晶体管故障模式检测和保护系统及方法

    公开(公告)号：US20140368232A1

    公开(公告)日：2014-12-18

    申请号：US14284895

    申请日：2014-05-22

    申请人： GENERAL ELECTRIC COMPANY

    发明人： Tao Wu

    IPC分类号： G01R31/26

    CPC分类号： G01R31/2612 ,  G01R31/261 ,  G01R31/2614 ,  G09G2230/00 ,  H01L21/00 ,  H01L2221/00 ,  H02M1/088 ,  H02M1/32 ,  H03K17/0828 ,  H03K17/10 ,  H03K17/18

    摘要： An assembly including an insulated gate bipolar transistor (IGBT) is provided. The IGBT is coupled with a gate driver for receiving a gating signal to drive the IGBT and providing a feedback signal of the IGBT which indicates a change of a collector-emitter voltage of the IGBT. The assembly further includes a failure mode detection unit for determining whether the IGBT is faulted based on a timing sequence of the gating signal and feedback signal. The failure mode detection unit is capable of differentiating fault types including a gate driver fault, a failed turn-on fault, a short-circuit fault, a turn-on over-voltage fault and a turn-off over-voltage fault. Accordingly, an IGBT failure mode detection method is also provided.

    摘要翻译： 提供了一种包括绝缘栅双极晶体管（IGBT）的组件。 IGBT与栅极驱动器耦合，用于接收选通信号以驱动IGBT并提供指示IGBT的集电极 - 发射极电压变化的IGBT的反馈信号。 组件还包括故障模式检测单元，用于基于门控信号和反馈信号的定时序列确定IGBT是否故障。 故障模式检测单元能够区分故障类型，包括门极驱动器故障，故障接通故障，短路故障，导通过电压故障和关断过电压故障。 因此，还提供了IGBT故障模式检测方法。

    Semiconductor device with monitor pattern, and a method of monitoring device parameters
    2.
    发明授权
    Semiconductor device with monitor pattern, and a method of monitoring device parameters 失效
    具有监视器模式的半导体器件，以及监视器件参数的方法

    公开(公告)号：US4364010A

    公开(公告)日：1982-12-14

    申请号：US128881

    申请日：1980-03-10

    申请人： Kiyoto Watari ,  Takeshi Fukuda

    发明人： Kiyoto Watari ,  Takeshi Fukuda

    IPC分类号： H01L21/66 ,  G01R31/26 ,  H01L21/331 ,  H01L23/544 ,  H01L29/72 ,  H01L29/73 ,  B01J17/00

    CPC分类号： H01L22/34 ,  G01R31/2614 ,  H01L29/72 ,  H01L2924/0002

    摘要： A semiconductor device with a monitor pattern and a method for monitoring device parameters. The monitor pattern comprises a semiconductor layer, a first region, a second region and a third region. The first region is formed in the semiconductor layer. The second region is formed within the first region so that the surface of the first region is divided into two portions. The third region is formed in the semiconductor layer and electrically connected to the substrate. One of the two portions of the first region is electrically connected to the third region.As the second region becomes deeper, the connection (lying beneath the second region) which connects the two portions of the first region becomes thinner. As this connection becomes thinner, its resistance is increased. Thus, monitoring of resistance between the two portions of the first region provides an index of the depth of the second region, and thereby of doping profile change during manufacture.

    摘要翻译： 具有监视器图案的半导体器件和用于监视器件参数的方法。 监视器图案包括半导体层，第一区域，第二区域和第三区域。 第一区域形成在半导体层中。 第二区域形成在第一区域内，使得第一区域的表面被分成两部分。 第三区域形成在半导体层中并与衬底电连接。 第一区域的两个部分中的一个电连接到第三区域。 当第二区域变得更深时，连接第一区域的两个部分的连接（位于第二区域下方）变得更薄。 随着这种连接变薄，其电阻增加。 因此，监测第一区域的两部分之间的电阻提供第二区域的深度的指标，从而提供制造期间的掺杂分布变化。

    Circuit and method for measuring the amplification factor of an in-circuit or out-of-circuit transistor
    3.
    发明授权
    Circuit and method for measuring the amplification factor of an in-circuit or out-of-circuit transistor 失效
    用于测量电路或电路外晶体管放大因子的电路和方法

    公开(公告)号：US3594640A

    公开(公告)日：1971-07-20

    申请号：US3594640D

    申请日：1968-02-14

    申请人： RCA CORP

    发明人： KNANISHU SANDER L

    IPC分类号： G01R31/26 ,  G01R31/28 ,  G01R31/22

    CPC分类号： G01R31/2614 ,  G01R31/2843

    摘要： A method and a circuit for measuring the amplification factor (beta) of an in-circuit transistor is disclosed. A first potential of one polarity is applied across a first fixed resistor and the collector-emitter path of the transistor. A second potential of opposite polarity is applied across a first variable resistor and the first fixed resistor, the resistance of the first variable resistor being adjusted until the net voltage across the first fixed resistor is zero. The first potential is also applied through a second fixed resistor, a second variable resistor, and the base-emitter path of the transistor, and the second variable resistor is adjusted until a predetermined current flows through the first fixed resistor and the collectoremitter path of the transistor. A meter is provided for measuring the current through the first and second fixed resistors and obtaining their ratio.

    Test circuit for bipolar junction transistor
    7.
    发明授权
    Test circuit for bipolar junction transistor 有权
    双极结晶体管测试电路

    公开(公告)号：US08922238B2

    公开(公告)日：2014-12-30

    申请号：US13217257

    申请日：2011-08-25

    申请人： Yi-Xin Tu ,  Hai-Qing Zhou

    发明人： Yi-Xin Tu ,  Hai-Qing Zhou

    IPC分类号： G01R31/26

    CPC分类号： G01R31/2614

    摘要： A test circuit includes a first test circuit. The first test circuit includes a first light-emitting diode (LED) and a first resistor. An anode of the first LED is connected to a power supply. A cathode of the first LED is connected to a collector of a bipolar junction transistor (BJT) through the first resistor. An emitter of the BJT is grounded. A base of the BJT is connected to the power supply. A type of the BJT can be determined according to status of the first LED.

    摘要翻译： 测试电路包括第一测试电路。 第一测试电路包括第一发光二极管（LED）和第一电阻器。 第一LED的阳极连接到电源。 第一LED的阴极通过第一电阻器连接到双极结型晶体管（BJT）的集电极。 BJT的发射极接地。 BJT的基座连接到电源。 BJT的类型可以根据第一LED的状态来确定。

    Automatic transistor checker
    8.
    发明授权
    Automatic transistor checker 失效
    自动晶体管检查器

    公开(公告)号：US5355082A

    公开(公告)日：1994-10-11

    申请号：US858860

    申请日：1992-03-27

    申请人： Paul T. Schreiber ,  Douglas R. Curtis

    发明人： Paul T. Schreiber ,  Douglas R. Curtis

    IPC分类号： G01R31/26 ,  G01R31/02

    CPC分类号： G01R31/2614

    摘要： An automatic transistor checking method is provided, whereby an unknown, bipolar transistor may be typed, pinned and checked for forward DC gain, H.sub.fe. The method is suitable for portable instruments, because the method uses little battery current to perform the H.sub.fe measurement. The method automatically determines transistor type (NPN or PNP) and pinout, making it suitable for quick checking of batches of unknown devices.

    摘要翻译： 提供自动晶体管检查方法，由此可以对未知的双极晶体管进行类型化，固定和检查正向直流增益Hfe。 该方法适用于便携式仪器，因为该方法使用少量电池电流来执行Hfe测量。 该方法自动确定晶体管类型（NPN或PNP）和引脚排列，使其适合快速检查未知器件的批次。

    In-circuit transistor beta test and method
    9.
    发明授权
    In-circuit transistor beta test and method 失效
    在线晶体管beta测试和方法

    公开(公告)号：US4801878A

    公开(公告)日：1989-01-31

    申请号：US064157

    申请日：1987-06-18

    申请人： Ronald J. Peiffer ,  David T. Crook

    发明人： Ronald J. Peiffer ,  David T. Crook

    IPC分类号： G01R31/26 ,  H01L21/66 ,  G01R31/22

    CPC分类号： G01R31/2614

    摘要： An in-circuit test device and method for testing transistors which are connected to various components on a printed circuit board. The present invention uses a fully automated system which provides a constant emitter current to bias the transistor to a predetermined level and prevents the transistor from going into saturation due to variations in the gain of different transistors. The collector lead and base lead are maintained at approximately ground potential so that the collector emitter voltage drop is maintained above the saturation voltage for transistors since the base emitter junction is biased by a constant emitter current placed in the emitter lead. Transistor gain is determined from the difference in two separate d.c. emitter currents which eliminates the effects of parallel impedence paths resulting from other components connected to the transistor on the printed circuit board. An operational amplifier having a feedback resistance is used so that the output voltage is directly proportional to the current flowing through the base of the transistor.