Frame rate conversion apparatus for video signal and display apparatus
    1.
    发明授权
    Frame rate conversion apparatus for video signal and display apparatus 有权
    视频信号和显示装置的帧速率转换装置

    公开(公告)号:US08319887B2

    公开(公告)日:2012-11-27

    申请号:US11949907

    申请日:2007-12-04

    Abstract: Provided is a frame rate conversion apparatus for inputting a video signal and inserting an interpolation frame into the video signal so as to convert a frame rate of the video signal. The apparatus includes: an input unit for inputting the video signal; a video interpolation unit for generating an interpolation frame and performing an interpolation process of the video signal; and a control unit for controlling the generation process of the interpolation frame by the video interpolation unit. The video interpolation unit performs the interpolation frame generation process by using a plurality of methods, and the control unit controls switching between the plurality of interpolation frame generating methods.

    Abstract translation: 提供了一种用于输入视频信号并将插值帧插入到视频信号中以便转换视频信号的帧速率的帧速率转换装置。 该装置包括:用于输入视频信号的输入单元; 视频插值单元,用于生成内插帧并执行视频信号的内插处理; 以及控制单元,用于通过视频内插单元控制内插帧的生成处理。 视频内插单元通过使用多种方法执行插值帧生成处理,并且控制单元控制多个插值帧生成方法之间的切换。

    Method and apparatus for adjusting size of image
    2.
    发明授权
    Method and apparatus for adjusting size of image 有权
    调整图像大小的方法和装置

    公开(公告)号:US07362337B2

    公开(公告)日:2008-04-22

    申请号:US11392702

    申请日:2006-03-30

    Applicant: Fu-Chung Chi

    Inventor: Fu-Chung Chi

    CPC classification number: G06T3/4015

    Abstract: A method for transforming an original image to a new image is provided. The original image includes M rows of original data; the new image includes Q rows of new data. The method first generates a (2i−1)th row and a (2i)th row of intermediate data respectively based on the (2i−1)th row and the (2i)th row of original data. Then, the method generates a (2i+1)th row and a (2i+2)th row of intermediate data respectively based on the (2i+1)th row and the (2i+2)th row of original data. During the process of generating the (2i+1)th row of intermediate data, the (2j−1)th row of new data is simultaneously generated based on the (2i−1)th row and the (2i+1)th row of intermediate data. During the process of generating the (2i+2)th row of intermediate data, the (2j)th row of new data is simultaneously generated based on the (2i)th row and the (2i+2)th row of intermediate data.

    Abstract translation: 提供了将原始图像变换为新图像的方法。 原始图像包括M行原始数据; 新图像包括Q行的新数据。 该方法首先分别基于(2i-1)行和第(2i)行的原始数据生成第(2i-1)行和第(2i)行的中间数据。 然后,分别基于第(2i + 1)行和第(2i + 2)行的原始数据分别生成第(2i + 1)行和第(2i + 2)行的中间数据。 在生成第(2i + 1)行中间数据的过程中,基于第(2i-1)行和第(2i + 1)行,同时产生新数据的第(2j-1)行 的中间数据。 在生成第(2i + 2)行中间数据的过程中,基于第(2i)行和第(2i + 2)行的中间数据同时生成新数据的第(2j)行。

    Digital image rate converting method and device
    3.
    发明授权
    Digital image rate converting method and device 失效
    数字图像速率转换方法和装置

    公开(公告)号:US6094227A

    公开(公告)日:2000-07-25

    申请号:US14173

    申请日:1998-01-27

    Abstract: A digital signal converting method and device for converting an input image rate into an output image rate, is applied to input images which are formed by a plurality of input data frames. The method storing the input frames, calculating a sliding average over a plurality of stored frames, and deriving the averages for producing output images with a timing fixed by the output image rate.

    Abstract translation: 用于将输入图像速率转换为输出图像速率的数字信号转换方法和装置被应用于由多个输入数据帧形成的输入图像。 存储输入帧的方法,计算多个存储的帧的滑动平均,并且以由输出图像速率固定的定时导出用于产生输出图像的平均值。

    Vertical compression circuit for an image playback system
    4.
    发明授权
    Vertical compression circuit for an image playback system 失效
    用于图像播放系统的垂直压缩电路

    公开(公告)号:US6016165A

    公开(公告)日:2000-01-18

    申请号:US865836

    申请日:1997-05-30

    Applicant: Seung-Ung Baek

    Inventor: Seung-Ung Baek

    CPC classification number: H04N7/012 H04N5/45

    Abstract: A vertical compression circuit of an image playback system displaying an image through interlaced scanning includes: a mode counter for counting horizontal lines within one section of vertical lines based on a compression mode signal and outputting a count; a coefficient selection signal generating unit for outputting a coefficient selection signal for selecting first and second filtering coefficients and for outputting a feedback control signal, based on the compression mode signal; a first coefficient selecting unit for generating first coefficients corresponding to various compression modes and outputting one of the first coefficients based on the first coefficient selection signal; a second coefficient selecting unit for generating second coefficients corresponding to various compression modes and outputting one of the second coefficients based on the second coefficient selection signal; an adder for adding the second coefficient output from the second coefficient selecting unit to one of zero and a feedback value, based on the feedback signal to produce a sum; a line memory unit for storing the output from the adder, wherein the adder outputs the second coefficient output from the second coefficient selecting unit if the feedback signal indicates no feedback, and the adder outputs the sum of the second coefficient output from the second coefficient selecting unit and a value previously stored in the line memory if the feedback signal indicates feedback; and a unit for adding the contents of the line memory unit and the output of the first coefficient selecting unit, and outputting a result.

    Abstract translation: 通过隔行扫描显示图像的图像重放系统的垂直压缩电路包括:模式计数器,用于基于压缩模式信号对一段垂直线内的水平线进行计数并输出计数; 系数选择信号生成单元,用于输出用于选择第一和第二滤波系数的系数选择信号,并且基于压缩模式信号输出反馈控制信号; 第一系数选择单元,用于产生与各种压缩模式对应的第一系数,并且基于第一系数选择信号输出第一系数中的一个; 第二系数选择单元,用于产生对应于各种压缩模式的第二系数,并且基于第二系数选择信号输出第二系数之一; 加法器,用于基于所述反馈信号将从所述第二系数选择单元输出的所述第二系数相加到零中的一个和反馈值,以产生和; 行存储器单元,用于存储来自加法器的输出,其中如果反馈信号指示没有反馈,则加法器输出从第二系数选择单元输出的第二系数,并且加法器从第二系数选择输出第二系数输出的和 单位和预先存储在行存储器中的值,如果反馈信号指示反馈; 以及用于将行存储单元的内容和第一系数选择单元的输出相加的单元,并输出结果。

    Non-linear interline flicker reducer
    5.
    发明授权
    Non-linear interline flicker reducer 失效
    非线性行间闪烁减速器

    公开(公告)号:US5828366A

    公开(公告)日:1998-10-27

    申请号:US527037

    申请日:1995-09-12

    Abstract: An apparatus and method for improving the display of progressively scanned images on displays that employ an interlace display technique. The apparatus comprises a vertical filter and a clipper. An input image is vertically low-pass and high-pass filtered through the vertical filter. The resulting high-pass signal is passed through the clipper such that a non-linear transfer function limits the maximum value that is permitted to pass through the clipper. The "clipped" high-pass signal is then recombined with the low-pass signal to reconstruct a flicker-reduced image. In this fashion, interline flicker is reduced while maintaining the full resolution of natural images.

    Abstract translation: 一种用于改进采用隔行显示技术的显示器上逐行扫描图像的显示的装置和方法。 该装置包括垂直过滤器和裁剪器。 输入图像垂直低通,并通过垂直滤波器进行高通滤波。 所产生的高通信号通过限幅器,使得非线性传递函数限制允许通过限幅器的最大值。 然后将“限幅”高通信号与低通信号重组,以重构闪烁减小的图像。 以这种方式,线间闪烁减少,同时保持自然图像的全分辨率。

    Planar/packed video data FIFO memory device
    6.
    发明授权
    Planar/packed video data FIFO memory device 失效
    平面/打包视频数据FIFO存储器件

    公开(公告)号:US5452235A

    公开(公告)日:1995-09-19

    申请号:US146416

    申请日:1993-11-01

    Applicant: Tarik Isani

    Inventor: Tarik Isani

    CPC classification number: H04N11/20 H04N11/042 H04N9/64 H04N5/907

    Abstract: A memory device for a digital video system, capable of receiving video data in a packed format and transmitting that video data in a planar format. In other operating modes, the memory device receives video data in various packed formats and transmits that video data in a packed format. The memory device is suitable for a flexible digital video system in which video data may either be displayed in real time as it is generated (using packed format data) or compressed for storage and future display (using planar format data).

    Abstract translation: 一种用于数字视频系统的存储装置,能够以压缩格式接收视频数据并以平面格式发送该视频数据。 在其他操作模式下,存储器件以各种压缩格式接收视频数据,并以压缩格式发送该视频数据。 存储装置适用于灵活的数字视频系统,其中视频数据可以在生成(使用压缩格式数据)或被压缩以存储和将来显示(使用平面格式数据)时被实时显示)。

    Circuit with a comb filter for causing color difference signals to
coincide on each scanning line
    7.
    发明授权
    Circuit with a comb filter for causing color difference signals to coincide on each scanning line 失效
    具有用于使色差信号在每个扫描线上重合的梳状滤波器的电路

    公开(公告)号:US4992852A

    公开(公告)日:1991-02-12

    申请号:US258145

    申请日:1988-10-03

    CPC classification number: H04N9/86 H04N9/7908 H04N9/8707

    Abstract: A circuit for producing a chroma signal which includes both of a first and a second color difference signal on each of scanning lines in response to a line-sequential color difference signal in which a first and a second color difference signal appear alternately on consecutive scanning lines. A carrier generator generates a first and a second color subcarrier which are different in phase from each other in synchronism with the line-sequential color difference signal. The first color subcarrier is subjected to balanced modulation at a first modulator which uses the first color difference signal for the modulation while the second color subcarrier is subjected to balanced modulation at a second modulator which uses the second color difference signal. The outputs of the first and second modulators are added together by a first adder. A delay circuit is provided for delaying an output of the first adder by a period of time which is substantially equal to one horizontal scanning period. The output of the delay circuit is added to the output of the first adder by a second adder to produce the chroma signal. The circuit eliminates the need for operations heretofore performed for bringing color difference signals into coincidence at the baseband and thereby the need for delay circuits, switching circuits and adjusting circuits which implement such operations.

    Digital video signal processing system
    8.
    发明授权
    Digital video signal processing system 失效
    数字视频信号处理系统

    公开(公告)号:US4985757A

    公开(公告)日:1991-01-15

    申请号:US249697

    申请日:1988-09-27

    CPC classification number: H04N9/78 H04N7/012 H04N9/7921 H04N9/87

    Abstract: A signal separator performs an inter-line operation on a composite color video signal, thereby separating it into a luminance signal and a chrominance signal. A scan converter converts each of the luminance signal and the chrominance signal into a sequential scan signal on the basis of the double-speed changing of the luminance signal and the chrominance signal. A signal determination circuit determines whether the composite color video signal is a standard signal or a non-standard signal. A first clock producer produces first clocks to be phase-locked to a color subcarrier in accordance with the composite color digital video signal. A second clock producer produces second clocks to be phase-locked to horizontal synchronizing signals in accordance with the composite color digital video signal. A first controller causes the signal separator and the scan converter to operate in accordance with the first clocks when the signal determination circuit determines that the signal is a standard signal. A second controller causes the signal separator to operate in accordance with the first clocks, causes the scan converter to operate in accordance with the second clocks, and converts a sampling rate of each of the luminance signal and the chrominance signal separated by the signal separator in accordance with the first clock into a rate of the second clocks when the signal determination circuit determines that the signal is a non-standard signal.

    Abstract translation: 信号分离器对复合彩色视频信号进行线间操作,从而将其分离为亮度信号和色度信号。 扫描转换器基于亮度信号和色度信号的双倍变化将亮度信号和色度信号中的每一个转换为顺序扫描信号。 信号确定电路确定复合彩色视频信号是标准信号还是非标准信号。 第一时钟生成器根据复合彩色数字视频信号产生要被锁相到彩色副载波的第一时钟。 第二时钟产生器根据复合彩色数字视频信号产生第二时钟以被锁相到水平同步信号。 当信号确定电路确定信号是标准信号时,第一控制器使得信号分离器和扫描转换器根据第一时钟进行操作。 第二控制器使得信号分离器根据第一时钟进行操作,使得扫描转换器根据第二时钟进行操作,并且将由信号分离器分离的每个亮度信号和色度信号的采样率转换为 当信号确定电路确定信号是非标准信号时,根据第一时钟转换成第二时钟的速率。

    Device for interpolating missing color-difference signal by averaging
line-sequential color-difference signals
    9.
    发明授权
    Device for interpolating missing color-difference signal by averaging line-sequential color-difference signals 失效
    通过平均线序色差信号来内插缺失色差信号的装置

    公开(公告)号:US4796085A

    公开(公告)日:1989-01-03

    申请号:US15078

    申请日:1987-02-17

    Applicant: Toru Shinada

    Inventor: Toru Shinada

    CPC classification number: H04N9/646 H04N1/56 H04N9/045

    Abstract: An apparatus interpolates color-difference line-sequential signals appearing alternately in a video signal together with a luminance signal. The video signal is received by an input circuit and then held temporarily and on a horizontal scanning line basis by a hold circuit. Each of the color-difference signals is interpolated by an interpolating circuit by producing an arithmetic mean of the color-difference data of the video signal being held by the hold circuit and color-difference data of the video signal being received by the input circuit, on the basis of the pixels corresponding to each other on horizontal scanning lines.

    Abstract translation: 一种装置将视频信号中交替显示的色差线序信号与亮度信号一起内插。 视频信号由输入电路接收,然后暂时保持在水平扫描线的基础上由保持电路保持。 通过产生由保持电路保持的视频信号的色差数据的算术平均值和由输入电路接收的视频信号的色差数据,通过内插电路对每个色差信号进行内插, 基于水平扫描线上彼此对应的像素。

    Clamping circuit for video signals
    10.
    发明授权
    Clamping circuit for video signals 失效
    视频信号钳位电路

    公开(公告)号:US4617590A

    公开(公告)日:1986-10-14

    申请号:US697660

    申请日:1985-02-04

    Applicant: Lynn D. Dann

    Inventor: Lynn D. Dann

    CPC classification number: H04N11/22 H04N9/86

    Abstract: A clamping circuit for use in a line sequential video processor sets separate dc voltage levels for a pair of color difference signals. The respective dc levels serve to identify the sequence of the color difference signals in the line sequential signal. By first setting the voltage offset between the respective levels, the dc voltage levels for both color difference signals are later established by clamping only to every other signal. The clamping circuit includes a monostable multivibrator that generates a clamping pulse only at the onset of every other color difference signal.

    Abstract translation: 用于线路顺序视频处理器的钳位电路为一对色差信号设置分开的直流电压电平。 相应的直流电平用于识别线序列信号中的色差信号的序列。 通过首先设置各个电平之间的电压偏移,两个色差信号的直流电压电平稍后通过仅对每个其他信号进行钳位来建立。 钳位电路包括仅在每隔一个色差信号开始时产生钳位脉冲的单稳态多谐振荡器。

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