公开(公告)号：US11658071B2

公开(公告)日：2023-05-23

申请号：US16753678

申请日：2018-09-04

申请人： SONY SEMICONDUCTOR SOLUTIONS CORPORATION

发明人： Naoki Saka

IPC分类号： H01L27/12 ,  H01L27/088 ,  H01L21/786 ,  H01L21/8226 ,  H01L29/786

CPC分类号： H01L21/786 ,  H01L21/8226 ,  H01L29/786

摘要： To more reliably suppress deterioration in characteristics due to signals (distortions) other than input and output waves while suppressing manufacturing cost. A semiconductor device according to the present disclosure includes a circuit substrate including an insulating film layer located above a predetermined semiconductor substrate and a semiconductor layer located above the insulating film layer, a plurality of passive elements provided on the circuit substrate and electrically connected with one another, and an electromagnetic shield layer locally provided in the insulating film layer corresponding to a portion where at least one of the plurality of passive elements is provided, and the electromagnetic shield layer and the semiconductor substrate are electrically separated from each other.

公开(公告)号：US20230025410A1

公开(公告)日：2023-01-26

申请号：US17937918

申请日：2022-10-04

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Mark GRISWOLD ,  Michael J. SEDDON

IPC分类号： H01L23/522 ,  H01L23/34 ,  H01L21/786 ,  H01L21/02 ,  H01L23/12

摘要： Implementations of a silicon-on-insulator (SOI) die may include a silicon layer including a first side and a second side, and an insulative layer coupled directly to the second side of the silicon layer. The insulative layer may not be coupled to any other silicon layer.

公开(公告)号：US20220359479A1

公开(公告)日：2022-11-10

申请号：US17620484

申请日：2020-06-22

申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES ,  CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE

发明人： Guy FEUILLET ,  Blandine ALLOING ,  Hubert BONO ,  Roy DAGHER ,  Jesus ZUNIGA PEREZ ,  Matthew CHARLES ,  Julien BUCKLEY ,  Rene ESCOFFIER

IPC分类号： H01L25/16 ,  H01L25/07 ,  H01L33/00 ,  H01L29/66 ,  H01L21/786

摘要： A method for obtaining mesas that are made at least in part of a nitride (N), the method includes providing a stack comprising a substrate and at least the following layers disposed in succession from the substrate a first layer, referred to as the flow layer, and a second, crystalline layer, referred to as the crystalline layer; forming pads by etching the crystalline layer and at least one portion of the flow layer such that: —each pad includes at least: —a first section, referred to as the flow section, formed by at least one portion of the flow layer, and a second, crystalline section, referred to as the crystalline section, framed by the crystalline layer and overlying the flow section, the pads are distributed over the substrate so as to form a plurality of sets of pads; and epitaxially growing a crystallite on at least some of said pads and continuing the epitaxial growth of the crystallites until the crystallites carried by the adjacent pads of the same set coalesce.

公开(公告)号：US11488933B2

公开(公告)日：2022-11-01

申请号：US16918281

申请日：2020-07-01

申请人： STATS ChipPAC Pte. Ltd.

发明人： Yaojian Lin ,  Pandi C. Marimuthu ,  Il Kwon Shim ,  Byung Joon Han

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L21/786 ,  H01L21/784 ,  H01L21/782 ,  H01L21/82 ,  H01L21/78

摘要： A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. A groove is formed in the base semiconductor material. The semiconductor wafer is singulated through the groove to separate the semiconductor die. The semiconductor die are disposed over a carrier with a distance of 500 micrometers (μm) or less between semiconductor die. The encapsulant covers a sidewall of the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while the encapsulant remains devoid of the fan-in interconnect structure. A portion of the encapsulant is removed from a non-active surface of the semiconductor die. The device is singulated through the encapsulant while leaving encapsulant disposed covering a sidewall of the semiconductor die. The encapsulant covering the sidewall includes a thickness of 50 μm or less.

公开(公告)号：US11251073B2

公开(公告)日：2022-02-15

申请号：US16837968

申请日：2020-04-01

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsin-Yen Huang ,  Hai-Ching Chen ,  Shau-Lin Shue

IPC分类号： H01L21/786 ,  H01L21/02 ,  H01L21/768 ,  H01L21/311 ,  H01L21/306

摘要： Integrated circuit devices and methods of forming the same are provided. A method according to the present disclosure includes providing a workpiece including a semiconductor substrate, a first ILD layer over the semiconductor substrate, and a first metal feature in the first ILD layer; depositing a second metal feature over the workpiece such that the second metal feature is electrically coupled to the first metal feature; patterning the second metal feature to form a first trench adjacent to the first metal feature; depositing a blocking layer over the workpiece, wherein the blocking layer selectively attaches to the first ILD layer; depositing a barrier layer over the workpiece, wherein the barrier layer selectively forms over the second metal feature relative to the first ILD layer; and depositing a second ILD layer over the workpiece.

公开(公告)号：US11233154B2

公开(公告)日：2022-01-25

申请号：US16470412

申请日：2018-12-21

申请人： BEIJING BOE DISPLAY TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

发明人： Di Zhang

IPC分类号： H01L21/786 ,  H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  H01L29/66 ,  H01L21/02 ,  H01L21/465 ,  H01L21/4763

摘要： A thin film transistor, a manufacturing method thereof, an array substrate, and a display panel are provided. The thin film transistor includes a semiconductor layer, a source and a drain. The semiconductor layer includes an active layer and a superhydrophobic layer. The active layer includes a source contact, a drain contact and a channel portion. The source corresponds to the source contact, and the drain corresponds to the drain contact. The superhydrophobic layer is disposed on a surface of the active layer proximal to the source and the drain. The superhydrophobic layer includes a plurality of multi-level nanostructures protruding from the surface of the active layer, and the superhydrophobic layer at least covers a channel portion of the active layer.

公开(公告)号：US10937674B2

公开(公告)日：2021-03-02

申请号：US16391333

申请日：2019-04-23

申请人： MIKRO MESA TECHNOLOGY CO., LTD.

发明人： Li-Yi Chen ,  Fang-Chi Chien

IPC分类号： H01L21/67 ,  H01L23/00 ,  B65G47/90 ,  H01L21/02 ,  H01L21/447 ,  H01L21/52 ,  H01L21/786 ,  H01L21/683 ,  H01L21/449 ,  H01L21/677 ,  H01L27/15 ,  H01L33/00

摘要： A method for transferring a micro device is provided. The method includes: preparing a carrier substrate with the micro device thereon, wherein an adhesive layer is between and in contact with the carrier substrate and the micro device; picking up the micro-device from the carrier substrate by a transfer head; forming a liquid layer on a receiving substrate; and placing the micro device over the receiving substrate by the transfer head such that the micro device is in contact with the liquid layer and is gripped by a capillary force; and moving the transfer head away from the receiving substrate such that the micro device is detached from the transfer head and is stuck to the receiving substrate.

公开(公告)号：US20200294857A1

公开(公告)日：2020-09-17

申请号：US16753678

申请日：2018-09-04

申请人： SONY SEMICONDUCTOR SOLUTIONS CORPORATION

发明人： NAOKI SAKA

IPC分类号： H01L21/786 ,  H01L29/786 ,  H01L21/8226

摘要： To more reliably suppress deterioration in characteristics due to signals (distortions) other than input and output waves while suppressing manufacturing cost. A semiconductor device according to the present disclosure includes a circuit substrate including an insulating film layer located above a predetermined semiconductor substrate and a semiconductor layer located above the insulating film layer, a plurality of passive elements provided on the circuit substrate and electrically connected with one another, and an electromagnetic shield layer locally provided in the insulating film layer corresponding to a portion where at least one of the plurality of passive elements is provided, and the electromagnetic shield layer and the semiconductor substrate are electrically separated from each other.

公开(公告)号：US10777528B2

公开(公告)日：2020-09-15

申请号：US15615693

申请日：2017-06-06

申请人： STATS ChipPAC Pte. Ltd.

发明人： Yaojian Lin ,  Pandi C. Marimuthu ,  Il Kwon Shim ,  Byung Joon Han

IPC分类号： H01L21/56 ,  H01L21/786 ,  H01L21/784 ,  H01L23/00 ,  H01L23/31 ,  H01L21/782 ,  H01L21/82 ,  H01L21/78

摘要： A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. A groove is formed in the base semiconductor material. The semiconductor wafer is singulated through the groove to separate the semiconductor die. The semiconductor die are disposed over a carrier with a distance of 500 micrometers (μm) or less between semiconductor die. The encapsulant covers a sidewall of the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while the encapsulant remains devoid of the fan-in interconnect structure. A portion of the encapsulant is removed from a non-active surface of the semiconductor die. The device is singulated through the encapsulant while leaving encapsulant disposed covering a sidewall of the semiconductor die. The encapsulant covering the sidewall includes a thickness of 50 μm or less.

公开(公告)号：US10672945B2

公开(公告)日：2020-06-02

申请号：US16115489

申请日：2018-08-28

申请人： NICHIA CORPORATION

发明人： Hirofumi Kawaguchi

IPC分类号： H01L33/00 ,  H01L33/38 ,  H01L33/62 ,  H01L33/42 ,  H01L21/786 ,  H01L33/40 ,  H01L33/32

摘要： A method of manufacturing a light emitting device includes: a first wafer preparation step including preparing, on a first substrate, m first wafers (where m≥2), each of the first wafers comprising a first semiconductor layer, an active layer, and a second semiconductor layer; a second wafer preparation step including bonding a second substrate with the second semiconductor layer of a first of the m first wafers and then removing the first substrate from the first wafer, so as to form a second wafer in which the first semiconductor layer is exposed; and a first bonding step including bonding the first semiconductor layer exposed at the surface of the second wafer and the second semiconductor layer of a second of the m first wafers together using a light-transmissive conductive layer, and then removing a first substrate of the second of the m first wafers.