专利检索 ap:("STATS ChipPAC Pte. Ltd.") AND inv:"Pandi C. Marimuthu" 第 1 页

1.

发明申请
Semiconductor Device with Encapsulant Deposited Along Sides and Surface Edge of Semiconductor Die in Embedded WLCSP 有权

公开(公告)号：US20220093417A1

公开(公告)日：2022-03-24

申请号：US17457719

申请日：2021-12-06

申请人： STATS ChipPAC Pte. Ltd.

发明人： Yaojian Lin , Heinz-Peter Wirtz , Seung Wook Yoon , Pandi C. Marimuthu

IPC分类号： H01L21/56 , H01L23/28 , H01L21/78 , H01L23/00 , H01L23/31 , H01L21/3105

摘要： A semiconductor device has a semiconductor wafer including a plurality of semiconductor die. An insulating layer is formed over the semiconductor wafer. A portion of the insulating layer is removed by LDA to expose a portion of an active surface of the semiconductor die. A first conductive layer is formed over a contact pad on the active surface of the semiconductor die. The semiconductor wafer is singulated to separate the semiconductor die. The semiconductor die is disposed over a carrier with the active surface of the semiconductor die offset from the carrier. An encapsulant is deposited over the semiconductor die and carrier to cover a side of the semiconductor die and the exposed portion of the active surface. An interconnect structure is formed over the first conductive layer. Alternatively, a MUF material is deposited over a side of the semiconductor die and the exposed portion of the active surface.

2.

发明授权
Semiconductor device and method of forming low profile fan-out package with vertical interconnection units 有权

公开(公告)号：US09978665B2

公开(公告)日：2018-05-22

申请号：US15611110

申请日：2017-06-01

申请人： STATS ChipPAC Pte. Ltd.

发明人： Pandi C. Marimuthu , Il Kwon Shim , Yaojian Lin , Won Kyoung Choi

IPC分类号： H01L21/00 , H01L23/48 , H01L23/00 , H01L23/498 , H01L25/065 , H01L21/56 , H01L23/538

CPC分类号： H01L23/481 , H01L21/568 , H01L23/49833 , H01L23/5389 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/94 , H01L24/96 , H01L25/0657 , H01L2224/03 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/0401 , H01L2224/04105 , H01L2224/05548 , H01L2224/05567 , H01L2224/05611 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/1132 , H01L2224/11334 , H01L2224/1134 , H01L2224/1145 , H01L2224/11462 , H01L2224/11464 , H01L2224/11849 , H01L2224/11901 , H01L2224/12105 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/16145 , H01L2224/16225 , H01L2224/16237 , H01L2224/32145 , H01L2224/73204 , H01L2224/73267 , H01L2224/81191 , H01L2224/81192 , H01L2224/94 , H01L2225/06513 , H01L2924/01322 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/3511 , H01L2924/00012 , H01L2924/00

摘要： A semiconductor device includes a semiconductor die. A first interconnect structure is disposed over a peripheral region of the semiconductor die. A semiconductor component is disposed over the semiconductor die. The semiconductor component includes a second interconnect structure. The semiconductor component is disposed over the semiconductor die to align the second interconnect structure with the first interconnect structure. The first interconnect structure includes a plurality of interconnection units disposed around first and second adjacent sides of the semiconductor die to form an L-shape border of the interconnection units around the semiconductor die. A third interconnect structure is formed over the semiconductor die perpendicular to the first interconnect structure. An insulating layer is formed over the semiconductor die and first interconnect structure. A plurality of vias is formed through the insulating layer and into the first interconnect structure with the second interconnect structure disposed within the vias.

3.

发明授权
Semiconductor device and method of using a standardized carrier to form embedded wafer level chip scale packages 有权

公开(公告)号：US11488932B2

公开(公告)日：2022-11-01

申请号：US16827363

申请日：2020-03-23

申请人： STATS ChipPAC Pte. Ltd.

发明人： Byung Joon Han , Il Kwon Shim , Yaojian Lin , Pandi C. Marimuthu

IPC分类号： H01L23/00 , H01L21/56 , H01L23/31 , H01L21/78

摘要： A semiconductor device includes a standardized carrier. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. The semiconductor wafer is singulated through a first portion of the base semiconductor material to separate the semiconductor die. The semiconductor die are disposed over the standardized carrier. A size of the standardized carrier is independent from a size of the semiconductor die. An encapsulant is deposited over the standardized carrier and around the semiconductor die. An interconnect structure is formed over the semiconductor die while leaving the encapsulant devoid of the interconnect structure. The semiconductor device is singulated through the encapsulant. Encapsulant remains disposed on a side of the semiconductor die. Alternatively, the semiconductor device is singulated through a second portion of the base semiconductor and through the encapsulant to remove the second portion of the base semiconductor and encapsulant from the side of the semiconductor die.

4.

发明申请
Semiconductor Device and Method of Forming Embedded Wafer Level Chip Scale Packages 审中-公开

公开(公告)号：US20200335478A1

公开(公告)日：2020-10-22

申请号：US16918281

申请日：2020-07-01

申请人： STATS ChipPAC Pte. Ltd.

发明人： Yaojian Lin , Pandi C. Marimuthu , Il Kwon Shim , Byung Joon Han

IPC分类号： H01L23/00 , H01L23/31 , H01L21/56 , H01L21/786 , H01L21/784 , H01L21/782 , H01L21/82 , H01L21/78

摘要： A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. A groove is formed in the base semiconductor material. The semiconductor wafer is singulated through the groove to separate the semiconductor die. The semiconductor die are disposed over a carrier with a distance of 500 micrometers (μm) or less between semiconductor die. The encapsulant covers a sidewall of the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while the encapsulant remains devoid of the fan-in interconnect structure. A portion of the encapsulant is removed from a non-active surface of the semiconductor die. The device is singulated through the encapsulant while leaving encapsulant disposed covering a sidewall of the semiconductor die. The encapsulant covering the sidewall includes a thickness of 50 μm or less.

5.

发明授权
Semiconductor device and method of using substrate having base and conductive posts to form vertical interconnect structure in embedded die package 有权

公开(公告)号：US10242948B2

公开(公告)日：2019-03-26

申请号：US15380788

申请日：2016-12-15

申请人： STATS ChipPAC Pte. Ltd.

发明人： Il Kwon Shim , Jun Mo Koo , Pandi C. Marimuthu , Yaojian Lin , See Chian Lim

IPC分类号： H01L23/538 , H01L23/48 , H01L21/48 , H01L23/498 , H01L23/00 , H01L25/10 , H01L25/00 , H01L23/31 , H01L21/56

摘要： A semiconductor device has a substrate including a base and a plurality of conductive posts extending from the base. The substrate can be a wafer-shape, panel, or singulated form. The conductive posts can have a circular, rectangular, tapered, or narrowing intermediate shape. A semiconductor die is disposed through an opening in the base between the conductive posts. The semiconductor die extends above the conductive posts or is disposed below the conductive posts. An encapsulant is deposited over the semiconductor die and around the conductive posts. The base and a portion of the encapsulant is removed to electrically isolate the conductive posts. An interconnect structure is formed over the semiconductor die, encapsulant, and conductive posts. An insulating layer is formed over the semiconductor die, encapsulant, and conductive posts. A semiconductor package is disposed over the semiconductor die and electrically connected to the conductive posts.

6.

发明授权
Semiconductor device and method of using a standardized carrier in semiconductor packaging 有权

公开(公告)号：US10181423B2

公开(公告)日：2019-01-15

申请号：US15414469

申请日：2017-01-24

申请人： STATS ChipPAC Pte. Ltd.

发明人： Thomas J. Strothmann , Damien M. Pricolo , Il Kwon Shim , Yaojian Lin , Heinz-Peter Wirtz , Seung Wook Yoon , Pandi C. Marimuthu

IPC分类号： H01L21/78 , H01L23/28 , H01L23/522 , H01L23/31 , H01L21/56 , H01L23/00 , H01L23/498 , H01L21/683

摘要： A semiconductor device has a carrier with a fixed size. A plurality of first semiconductor die is singulated from a first semiconductor wafer. The first semiconductor die are disposed over the carrier. The number of first semiconductor die on the carrier is independent from the size and number of first semiconductor die singulated from the first semiconductor wafer. An encapsulant is deposited over and around the first semiconductor die and carrier to form a reconstituted panel. An interconnect structure is formed over the reconstituted panel while leaving the encapsulant devoid of the interconnect structure. The reconstituted panel is singulated through the encapsulant. The first semiconductor die are removed from the carrier. A second semiconductor die with a size different from the size of the first semiconductor die is disposed over the carrier. The fixed size of the carrier is independent of a size of the second semiconductor die.