ETCH AND SIDEWALL SELECTIVITY IN PLASMA SPUTTERING
    31.
    发明申请
    ETCH AND SIDEWALL SELECTIVITY IN PLASMA SPUTTERING 审中-公开
    等离子喷溅中的ETCH和SIDEWALL选择性

    公开(公告)号:WO2007102970A2

    公开(公告)日:2007-09-13

    申请号:PCT/US2007/003482

    申请日:2007-02-08

    Abstract: A substrate processing method practiced in a plasma sputter reactor (8) including an RF coil (44) and two or more coaxial electromagnets (78, 80), at least two of which are wound at different radii. After a barrier layer, for example, of tantalum is sputter deposited into a via hole, the RF coil is powered to cause argon sputter etching of the barrier layer and the current to the electromagnets are adjusted to steer the argon ions, for example to eliminate sidewall asymmetry. For example, the two electromagnets are powered with unequal currents of opposite polarities or a third electromagnet wrapped at a different height is powered. In one embodiment, the steering straightens the trajectories near the wafer edge. In another embodiment, the etching is divided into two steps in which the steering inclines the trajectories at opposite angles. The invention may also be applied to other materials, such as copper.

    Abstract translation: 在包括RF线圈(44)和两个或更多个同轴电磁体(78,80)的等离子体溅射反应器(8)中实施的衬底处理方法,其中至少两个以不同的半径缠绕。 在阻挡层之后,例如钽被溅射沉积到通孔中,RF线圈被供电以对阻挡层进行氩溅射蚀刻,并且调节到电磁体的电流以引导氩离子,例如以消除 侧壁不对称。 例如,两个电磁铁由具有相反极性的不相等的电流供电,或者以不同高度包装的第三电磁体被供电。 在一个实施例中,转向拉直晶片边缘附近的轨迹。 在另一个实施例中,蚀刻被分成两个步骤,其中操纵以相反的角度倾斜轨迹。 本发明也可以应用于其它材料,例如铜。

    CONTROL OF PLASMA PROFILE USING MAGNETIC NULL ARRANGEMENT BY AUXILIARY MAGNETS
    32.
    发明申请
    CONTROL OF PLASMA PROFILE USING MAGNETIC NULL ARRANGEMENT BY AUXILIARY MAGNETS 审中-公开
    使用辅助磁铁的磁性空安排来控制等离子体轮廓

    公开(公告)号:WO2012018770A3

    公开(公告)日:2012-08-09

    申请号:PCT/US2011046204

    申请日:2011-08-02

    CPC classification number: H01F7/0278 H01J37/3408 H01J37/3461

    Abstract: Magnetrons for use in physical vapor deposition (PVD) chambers and methods of use thereof are provided herein. In some embodiments, an apparatus may include a support member having an axis of rotation; a plurality of first magnets coupled to the support member on a first side of the axis of rotation and having a first polarity oriented in a first direction perpendicular to the support member; and a second magnet coupled to the support member on a second side of the axis of rotation opposite the first side and having a second polarity oriented in a second direction opposite the first direction. In some embodiments, the apparatus is capable of forming a magnetic field including one or more magnetic nulls that modulate local plasma uniformity in a physical vapor deposition (PVD) chamber.

    Abstract translation: 本文提供了用于物理气相沉积(PVD)室的磁控管及其使用方法。 在一些实施例中,装置可以包括具有旋转轴线的支撑构件; 多个第一磁体,其在所述旋转轴线的第一侧上联接到所述支撑构件,并且具有在垂直于所述支撑构件的第一方向上定向的第一极性; 以及第二磁体,其在所述旋转轴线的与所述第一侧相反的第二侧上与所述支撑构件相耦合,并且具有在与所述第一方向相反的第二方向上定向的第二极性。 在一些实施例中,该装置能够形成包括调制物理气相沉积(PVD)室中的局部等离子体均匀性的一个或多个磁零点的磁场。

    LOW RESISTIVITY TUNGSTEN PVD WITH ENHANCED IONIZATION AND RF POWER COUPLING
    33.
    发明申请
    LOW RESISTIVITY TUNGSTEN PVD WITH ENHANCED IONIZATION AND RF POWER COUPLING 审中-公开
    具有增强离子化和射频功率耦合的低电阻TUNGSTEN PVD

    公开(公告)号:WO2011156650A3

    公开(公告)日:2012-04-19

    申请号:PCT/US2011039867

    申请日:2011-06-09

    Abstract: Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal nitride film layer on the conductive film layer, a silicon-containing film layer on the refractory metal nitride film layer, and a tungsten film layer on the silicon-containing film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal nitride film layer on the conductive film layer, depositing a silicon-containing film layer on the refractory metal nitride film layer, and depositing a tungsten film layer on the silicon-containing film layer.

    Abstract translation: 本文描述的实施例提供了一种半导体器件及其形成方法和装置。 半导体器件包括在源极和漏极区域之间的衬底上具有源极和漏极区域以及栅电极堆叠的衬底。 栅极电极堆叠包括在栅极电介质层上的导电膜层,导电膜层上的难熔金属氮化物膜层,难熔金属氮化物膜层上的含硅膜层,以及硅 - 含有膜层。 在一个实施例中,该方法包括将衬底定位在处理室内,其中衬底包括源极和漏极区域,源极和漏极区域之间的栅极介电层以及栅极电介质层上的导电膜层。 该方法还包括在导电膜层上沉积难熔金属氮化物膜层,在难熔金属氮化物膜层上沉积含硅膜层,并在含硅膜层上沉积钨膜层。

    METHODS FOR FORMING INTERCONNECT STRUCTURES
    35.
    发明申请
    METHODS FOR FORMING INTERCONNECT STRUCTURES 审中-公开
    形成互连结构的方法

    公开(公告)号:WO2011156349A2

    公开(公告)日:2011-12-15

    申请号:PCT/US2011/039414

    申请日:2011-06-07

    Abstract: Methods for forming interconnect structures are provided herein. In some embodiments, a method for forming an interconnect on a substrate may include depositing a material atop an upper surface of the substrate and atop one or more surfaces of a feature disposed in the substrate by a first deposition process that deposits the material at a faster rate on the upper surface than on a bottom surface of the feature; depositing the material atop the upper surface of the substrate and atop one or more surfaces of the feature by a second deposition process that deposits the material at a greater rate on the bottom surface of the feature than on the upper surface of the substrate; and heating the deposited material to draw the deposited material towards the bottom surface of the feature to at least partially fill the feature with the deposited material.

    Abstract translation: 本文提供形成互连结构的方法。 在一些实施例中,用于在衬底上形成互连的方法可以包括通过第一沉积工艺沉积衬底的上表面顶部的材料,以及设置在衬底中的特征的顶部的一个或多个表面上,所述第一沉积工艺以更快的速度沉积材料 在上表面上比在特征的底表面上的速率; 通过第二沉积工艺将所述材料沉积在所述基底的上表面顶部和所述特征的一个或多个表面上方,所述第二沉积工艺在所述特征的底表面上以比在所述基底的上表面上更大的速率沉积材料; 以及加热沉积的材料以将沉积的材料拉向特征的底表面,以至少部分地用沉积的材料填充该特征。

    CONTROL OF EROSION PROFILE ON A DIELECTRIC RF SPUTTER TARGET
    39.
    发明申请
    CONTROL OF EROSION PROFILE ON A DIELECTRIC RF SPUTTER TARGET 审中-公开
    射频溅射靶材上侵蚀剖面的控制

    公开(公告)号:WO2010045026A2

    公开(公告)日:2010-04-22

    申请号:PCT/US2009/059108

    申请日:2009-09-30

    Abstract: The present invention generally includes a sputtering target assembly that may be used in an RF sputtering process. The sputtering target assembly may include a backing plate and a sputtering target. The backing plate may be shaped to have one or more fins that extend from the backing plate towards the sputtering target. The sputtering target may be bonded to the fins of the backing plate. The RF current utilized during a sputtering process will be applied to the sputtering target at the one or more fin locations. The fins may extend from the backing plate at a location that corresponds to a magnetic field produced by a magnetron that may be disposed behind the backing plate. By controlling the location where the RF current is coupled to the sputtering target to be aligned with the magnetic field, the erosion of the sputtering target may be controlled.

    Abstract translation: 本发明通常包括可用于RF溅射工艺中的溅射靶组件。 溅射靶组件可以包括背板和溅射靶。 背板可成形为具有一个或多个从背板朝向溅射靶延伸的翅片。 溅射靶可以结合到背板的散热片。 在溅射过程中使用的RF电流将被施加到在一个或多个鳍状物位置处的溅射靶。 翅片可以在与可以布置在背板后面的磁控管产生的磁场对应的位置处从背板延伸。 通过控制RF电流与溅射靶耦合的位置以与磁场对准,可以控制溅射靶的侵蚀。

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