DATA PROCESSING SYSTEM HAVING EXECUTION FLOW TRANSFER CIRCUITRY FOR TRANSFERRING EXECUTION OF A SINGLE INSTRUCTION STREAM BETWEEN HYBRID PROCESSING UNITS OPERATING IN DIFFERENT POWER DOMAINS
    1.
    发明申请
    DATA PROCESSING SYSTEM HAVING EXECUTION FLOW TRANSFER CIRCUITRY FOR TRANSFERRING EXECUTION OF A SINGLE INSTRUCTION STREAM BETWEEN HYBRID PROCESSING UNITS OPERATING IN DIFFERENT POWER DOMAINS 审中-公开
    具有执行流量传输电路的数据处理系统,用于传输在不同功率域中操作的混合处理单元之间的单个指令流的执行

    公开(公告)号:WO2011135319A1

    公开(公告)日:2011-11-03

    申请号:PCT/GB2011/050376

    申请日:2011-02-25

    Abstract: A data processing apparatus is provided comprising first processing circuitry, second processing circuitry and shared processing circuitry. The first processing circuitry and second processing circuitry are configured to operate in different first and second power domains respectively and the shared processing circuitry is configured to operate in a shared power domain. The data processing apparatus forms a uni-processing environment for executing a single instruction stream in which either the first processing circuitry and the shared processing circuitry operate together to execute the instruction stream or the second processing circuitry and the shared processing circuitry operate together to execute the single instruction stream. Execution flow transfer circuitry is provided for transferring at least one bit of processing-state restoration information between the two hybrid processing units.

    Abstract translation: 提供了包括第一处理电路,第二处理电路和共享处理电路的数据处理装置。 第一处理电路和第二处理电路被配置为分别在不同的第一和第二电源域中操作,并且共享处理电路被配置为在共享电力域中操作。 数据处理装置形成用于执行单个指令流的单一处理环境,其中第一处理电路和共享处理电路一起工作以执行指令流或第二处理电路,并且共享处理电路一起工作以执行 单指令流。 提供执行流传输电路用于在两个混合处理单元之间传送至少一位处理状态恢复信息。

    POWER CONTROL OF AN INTEGRATED CIRCUIT INCLUDING AN ARRAY OF INTERCONNECTED CONFIGURABLE LOGIC ELEMENTS
    2.
    发明申请
    POWER CONTROL OF AN INTEGRATED CIRCUIT INCLUDING AN ARRAY OF INTERCONNECTED CONFIGURABLE LOGIC ELEMENTS 审中-公开
    集成电路的功率控制,包括互连可配置逻辑元件的阵列

    公开(公告)号:WO2010043838A2

    公开(公告)日:2010-04-22

    申请号:PCT/GB2009002041

    申请日:2009-08-20

    CPC classification number: H03K19/17772 H03K19/17784 H03K19/17788

    Abstract: An integrated circuit (8) comprising an array (10) of interconnected configurable logic elements (12), such as an FPGA array, is provided. The logic elements are used to form a power controller (14) which separately controls the power state of different regions of the array. Each region of the array contains one or more logic elements. Each region has a corresponding region controller (16) responsive to one or more power signals generated by the power controller to switch that region into the requested power state.

    Abstract translation: 提供了包括诸如FPGA阵列的互连的可配置逻辑元件(12)的阵列(10)的集成电路(8)。 逻辑元件用于形成分别控制阵列的不同区域的功率状态的功率控制器(14)。 数组的每个区域都包含一个或多个逻辑元素。 每个区域具有响应于由功率控制器产生的一个或多个功率信号以将该区域切换到所请求的功率状态的对应的区域控制器(16)。

    COMMUNICATION WITHIN AN INTEGRATED CIRCUIT INCLUDING AN ARRAY OF INTERCONNECTED PROGRAMMABLE LOGIC ELEMENTS
    4.
    发明申请
    COMMUNICATION WITHIN AN INTEGRATED CIRCUIT INCLUDING AN ARRAY OF INTERCONNECTED PROGRAMMABLE LOGIC ELEMENTS 审中-公开
    集成电路中的通信,包括互连可编程逻辑元件阵列

    公开(公告)号:WO2010079326A3

    公开(公告)日:2010-09-02

    申请号:PCT/GB2010000012

    申请日:2010-01-06

    CPC classification number: H03K19/17736 H03K19/17732 H03K19/17744

    Abstract: An integrated circuit includes an array of interconnected programmable logic elements (2) each logic element performing data processing control by a configuration. The logic elements may be part of a field programmable gate array. Embedded within the array are a plurality of dedicated communication interface circuits (36) providing access to one or more shared communication channels (38) to provide intra-array communication. Communication transactions between functional unit (78, 80, 82, 84) are multiplexed (e.g. time-division-multiplexed) together to share a shared communication channel provided within the array.

    Abstract translation: 集成电路包括互连的可编程逻辑元件阵列(2),每个逻辑元件通过配置执行数据处理控制。 逻辑元件可以是现场可编程门阵列的一部分。 嵌入阵列内的多个专用通信接口电路(36)提供对一个或多个共享通信信道(38)的访问以提供阵列内通信。 功能单元(78,80,82,84)之间的通信事务被多路复用(例如,时分复用)在一起,以共享阵列内提供的共享通信信道。

    A METHOD FOR GENERATING A RECOMBINANT CLONAL CELL LINE AND NOVEL REAGENTS FOR USE IN THE METHOD
    6.
    发明申请
    A METHOD FOR GENERATING A RECOMBINANT CLONAL CELL LINE AND NOVEL REAGENTS FOR USE IN THE METHOD 审中-公开
    用于产生重组克隆细胞系的方法和用于该方法的新型试剂

    公开(公告)号:WO2009040555A2

    公开(公告)日:2009-04-02

    申请号:PCT/GB2008/003294

    申请日:2008-09-29

    CPC classification number: C12N15/1075 C07F5/022

    Abstract: A method for generating a recombinant clonal cell line expressing a target cell surface receptor at a specific level of expression from a cell population comprising cells transfected with a plasmid encoding the cDNA sequence of the target receptor and expressing the target cell surface receptor, the method comprising (c) incubating the cell population with a receptor specific fluorescent ligand (d) selecting single cells from step (c) expressing the target cell surface receptor by monitoring the specific binding of the fluorescent ligand using flow cytometry; and novel fluorescent ligands.

    Abstract translation: 一种生成表达靶细胞表面受体的重组克隆细胞系的方法,所述重组克隆细胞系来自包含用编码靶受体的cDNA序列的质粒转染并表达靶细胞表面受体的细胞的细胞群,所述方法包括 (c)用受体特异性荧光配体孵育细胞群体(d)通过使用流式细胞术监测荧光配体的特异性结合来选择表达靶细胞表面受体的步骤(c)中的单个细胞; 和新型荧光配体。

    FLUORESCENTLY TAGGED LIGANDS
    7.
    发明申请
    FLUORESCENTLY TAGGED LIGANDS 审中-公开
    荧光标签配置

    公开(公告)号:WO2004088312A2

    公开(公告)日:2004-10-14

    申请号:PCT/GB2004/001418

    申请日:2004-03-31

    Abstract: Library comprising a plurality of tagged non-peptide ligands of formula (I): (Lig J L ) m L(J T Tag) m (J T L(J L Lig) m ) p including and salts thereof comprising one or a plurality of same or different ligand moieties Lig each linked to a one or a plurality of same or different tag moieties Tag via same or different linker moieties L and same or different linking site or linking functionality J T and J L wherein Lig comprises a GPCR ligand, an inhibitor of an intracellular enzyme or a substrate or inhibitor of a drug transporter; L is a single bond or is any linking moiety selected from a heteroatom such as N, 0, S, P, branched or straight chain saturated or unsaturated, optionally heteroatom containing, C I-600 hydrocarbyl and combinations thereof, which may be monomeric, oligomeric having oligomeric repeat of 2 to 30 or polymeric having polymeric repeat in excess of 30 up to 300; Tag is any known or novel tagging substrate; m are each independently selected from a whole number integer from 1 to 3; p is 0 to 3 characterised in that linking is at same or different linking sites in compounds comprising different Lig, J L , L J T and/or - Tag and is at different linking sites in compounds comprising same Lig, J L , L J T and/or - Tag; process for the preparation thereof; process for the preparation of a library compound of formula (I) or a precursor of formula (IV); method for selecting a compound of formula (I) from a library thereof; compound of formula (I) associated with information relating to its pharmacological properties; a novel compound of formula (I) or precursor of formula (IV); uses thereof; methods for binding or inhibition therewith; use of a fluorescent target therewith; a modified cell surface GPCR and cells expressing the same; and a kit comprising a compound of formula (I) and a target therefor.

    Abstract translation: 包含多个标记的式(I)所示的非肽配体:(Lig JL)m L(JT Tag)m(JTL(JLLig)m)p包括其盐及其盐,其包含一个或多个相同或不同的配体部分 每个连接到一个或多个相同或不同标签部分的标签通过相同或不同的接头部分L和相同或不同的连接位点或连接官能团JT和JL标记,其中Lig包含GPCR配体,细胞内酶的抑制剂或 药物转运蛋白的底物或抑制剂; L是单键或是选自杂原子如N,O,S,P,支链或直链饱和或不饱和的,任选地含杂原子的C1-600烃基及其组合的任何连接部分,其可以是单体的,低聚的 具有2至30的寡聚重复或具有超过30至300的聚合物重复的聚合物; 标签是任何已知或新颖的标签底物; m各自独立地选自1至3的整数; p为0至3,其特征在于连接在包含不同的Lig,JL,L JT和/或 - Tag的化合物中的相同或不同的连接位点,并且在包含相同的Lig,JL,L JT和/或 - 标签; 制备方法; 用于制备式(I)的文库化合物或式(IV)的前体的方法; 从其文库中选择式(I)化合物的方法; 与其药理学性质有关的信息相关的式(I)化合物; 式(I)的新化合物或式(IV)的前体; 用途; 用于结合或抑制的方法; 使用荧光目标; 修饰的细胞表面GPCR和表达其的细胞; 和包含式(I)化合物及其靶标的试剂盒。

    OBSERVATION CELL ARRANGEMENT
    8.
    发明申请

    公开(公告)号:WO2011042755A3

    公开(公告)日:2011-04-14

    申请号:PCT/GB2010/051698

    申请日:2010-10-08

    Abstract: An observation cell arrangement for flow perfusion of a sample to be examined, the arrangement comprising a flow cell (21) having a cavity therein to receive the sample, the flow cell (21) arranged to receive a flow of fluid through the cavity that is directed over the sample from a cavity inlet (22) to a cavity outlet (23), the cavity inlet (22) associated with a fluid supply line, and a first flow supply path (24) connected to the fluid supply line via a valve (39), the first flow supply path (24) adapted to receive pressure from a pressure source comprising a pressure reservoir (29) to drive fluid flow through the cavity at a desired flow rate

    COMMUNICATION WITHIN AN INTEGRATED CIRCUIT INCLUDING AN ARRAY OF INTERCONNECTED PROGRAMMABLE LOGIC ELEMENTS
    9.
    发明申请
    COMMUNICATION WITHIN AN INTEGRATED CIRCUIT INCLUDING AN ARRAY OF INTERCONNECTED PROGRAMMABLE LOGIC ELEMENTS 审中-公开
    在集成电路内进行通信,包括一系列互连的可编程逻辑元件

    公开(公告)号:WO2010079326A2

    公开(公告)日:2010-07-15

    申请号:PCT/GB2010/000012

    申请日:2010-01-06

    CPC classification number: H03K19/17736 H03K19/17732 H03K19/17744

    Abstract: An integrated circuit includes an array of interconnected programmable logic elements (2) each logic element performing data processing control by a configuration. The logic elements may be part of a field programmable gate array. Embedded within the array are a plurality of dedicated communication interface circuits (36) providing access to one or more shared communication channels (38) to provide intra-array communication. Communication transactions between functional unit (78, 80, 82, 84) are multiplexed (e.g. time-division-multiplexed) together to share a shared communication channel provided within the array.

    Abstract translation: 集成电路包括互连可编程逻辑元件阵列(2),每个逻辑元件通过配置执行数据处理控制。 逻辑元件可以是现场可编程门阵列的一部分。 嵌入阵列内的是多个专用通信接口电路(36),提供对一个或多个共享通信信道(38)的访问以提供阵列内通信。 功能单元(78,80,82,84)之间的通信事务被多路复用(例如时分多路复用)在一起以共享在阵列内提供的共享通信信道。

    INTEGRATED CIRCUIT INCORPORATING AN ARRAY OF INTERCONNECTED PROCESSORS EXECUTING A CYCLE-BASED PROGRAM
    10.
    发明申请
    INTEGRATED CIRCUIT INCORPORATING AN ARRAY OF INTERCONNECTED PROCESSORS EXECUTING A CYCLE-BASED PROGRAM 审中-公开
    集成电路与互连处理器一同执行基于周期的程序

    公开(公告)号:WO2010046622A1

    公开(公告)日:2010-04-29

    申请号:PCT/GB2009/002456

    申请日:2009-10-13

    CPC classification number: G06F17/5054

    Abstract: An integrated circuit (4) is provided including an array (10) of processors (26) with interface circuitry (12) providing communication with further processing circuitry (14). The processors (26) within the array (10) execute individual programs which together provide the functionality of a cycle-based program. During each program-cycle of the cycle based program, each of the processors executes its respective program starting from a predetermined execution start point to evaluate a next state of at least some of the state variables of the cycle-based program. A boundary between program-cycles provides a synchronisation time (point) for processing operations performed by the array.

    Abstract translation: 提供了集成电路(4),其包括具有接口电路(12)的处理器(26)的阵列(10),其提供与另外的处理电路(14)的通信。 阵列(10)内的处理器(26)执行一起提供基于循环的程序的功能的各个程序。 在基于循环的程序的每个程序循环期间,每个处理器从预定执行开始点开始执行其各自的程序,以评估基于循环的程序的至少一些状态变量的下一个状态。 程序周期之间的边界提供了由阵列执行的处理操作的同步时间(点)。

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