公开(公告)号：WO2013109369A1

公开(公告)日：2013-07-25

申请号：PCT/US2012/069829

申请日：2012-12-14

Applicant: APPLIED MATERIALS, INC. ,  NGUYEN, Victor ,  BALSEANU, Mihaela ,  XIA, Li-Qun ,  WITTY, Derek, R.

Inventor： NGUYEN, Victor ,  BALSEANU, Mihaela ,  XIA, Li-Qun ,  WITTY, Derek, R.

IPC: C23C16/44 ,  C23C16/452 ,  H01L21/205

CPC classification number: H01L21/02167 ,  C23C16/345 ,  C23C16/56 ,  H01L21/0217 ,  H01L21/02222 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/02348 ,  H01L21/823807 ,  H01L29/7843

Abstract: Methods and apparatus for fornning conformal silicon nitride films at low temperatures on a substrate are provided. The methods of forming a silicon nitride layer include performing a deposition cycle including flowing a processing gas mixture into a processing chamber having a substrate therein, wherein the processing gas mixture comprises precursor gas molecules having labile silicon to nitrogen, silicon to carbon, or nitrogen to carbon bonds, activating the precursor gas at a temperature between about 20 °C to about 480 °C by preferentially breaking labile bonds to provide one or more reaction sites along a precursor gas molecule, forming a precursor material layer on the substrate, wherein the activated precursor gas molecules bond with a surface on the substrate at the one or more reaction sites, and performing a plasma treatment process on the precursor material layer to form a conformal silicon nitride layer.

Abstract translation: 提供了在衬底上在低温下制造保形氮化硅膜的方法和装置。 形成氮化硅层的方法包括进行沉积循环，包括使处理气体混合物流入其中具有衬底的处理室，其中处理气体混合物包含具有不稳定硅到氮，硅到碳或氮的前体气体分子， 碳键，通过优先断开不稳定键在约20℃至约480℃的温度下活化前体气体，以沿着前体气体分子提供一个或多个反应位点，在基底上形成前体材料层，其中活化的 前体气体分子在一个或多个反应位点与基底上的表面键合，并对前体材料层进行等离子体处理工艺以形成共形氮化硅层。

公开(公告)号：WO2012154428A2

公开(公告)日：2012-11-15

申请号：PCT/US2012/035656

申请日：2012-04-27

Applicant: APPLIED MATERIALS, INC. ,  YE, Weifeng ,  NGUYEN, Victor ,  SHEK, Mei-Yee ,  BALSEANU, Mihaela ,  XIA, Li-Qun ,  WITTY, Derek R.

Inventor： YE, Weifeng ,  NGUYEN, Victor ,  SHEK, Mei-Yee ,  BALSEANU, Mihaela ,  XIA, Li-Qun ,  WITTY, Derek R.

IPC: H01L21/3065

CPC classification number: H01L21/02074 ,  H01L21/76883

Abstract: A method for the removal of copper oxide from a copper and dielectric containing structure of a semiconductor chip is provided. The copper and dielectric containing structure may be planarized by chemical mechanical planarization (CMP) and treated by the method to remove copper oxide and CMP residues. Annealing in a hydrogen (H 2 ) gas and ultraviolet (UV) environment removes copper oxide, and a pulsed ammonia plasma removes CMP residues.

Abstract translation: 提供了一种从铜中除去氧化铜和包含半导体芯片的结构的方法。 可以通过化学机械平面化（CMP）对包含铜和电介质的结构进行平面化，并通过除去氧化铜和CMP残留物的方法进行处理。 在氢（H2）气体和紫外线（UV）环境中退火除去氧化铜，脉冲氨等离子体去除CMP残留物。

公开(公告)号：WO2011163037A3

公开(公告)日：2012-04-05

申请号：PCT/US2011040587

申请日：2011-06-15

Applicant: APPLIED MATERIALS INC ,  NGUYEN VICTOR T ,  XIA LI-QUN ,  BALSEANU MIHAELA ,  WITTY DEREK R

Inventor： NGUYEN VICTOR T ,  XIA LI-QUN ,  BALSEANU MIHAELA ,  WITTY DEREK R

IPC: H01L21/205

CPC classification number: H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/045

Abstract: In a method of depositing a crystalline germanium layer on a substrate, a substrate is placed in the process zone comprising a pair of process electrodes. In a deposition stage, a crystalline germanium layer is deposited on the substrate by introducing a deposition gas comprising a germanium-containing gas into the process zone, and forming a capacitively coupled plasma of the deposition gas by coupling energy to the process electrodes. In a subsequent treatment stage, the deposited crystalline germanium layer is treated by exposing the crystalline germanium layer to an energized treatment gas or by annealing the layer.

Abstract translation: 在将晶体锗层沉积在衬底上的方法中，将衬底放置在包括一对工艺电极的工艺区域中。 在沉积阶段，通过将包含含锗气体的沉积气体引入到工艺区中，在衬底上沉积结晶锗层，并通过将能量耦合到工艺电极来形成沉积气体的电容耦合等离子体。 在随后的处理阶段中，通过将结晶锗层暴露于带电处理气体或通过退火层来处理沉积的结晶锗层。

公开(公告)号：WO2011153484A2

公开(公告)日：2011-12-08

申请号：PCT/US2011/039145

申请日：2011-06-03

Applicant: APPLIED MATERIALS, INC. ,  LEE, Yong-Won ,  ZUBKOV, Vladimir ,  SHEK, Mei-Yee ,  XIA, Li-Qun ,  IYENGAR, Prahallad ,  BALUJA, Sanjeev ,  HENDRICKSON, Scott A. ,  ROCHA-ALVAREZ, Juan Carlos ,  NOWAK, Thomas ,  WITTY, Derrick R.

Inventor： LEE, Yong-Won ,  ZUBKOV, Vladimir ,  SHEK, Mei-Yee ,  XIA, Li-Qun ,  IYENGAR, Prahallad ,  BALUJA, Sanjeev ,  HENDRICKSON, Scott A. ,  ROCHA-ALVAREZ, Juan Carlos ,  NOWAK, Thomas ,  WITTY, Derrick R.

IPC: C23C16/04 ,  C23C16/44 ,  H01L21/205

CPC classification number: H01L21/02271 ,  C23C16/402 ,  H01L21/02164 ,  H01L21/0332 ,  H01L21/76898

Abstract: A silicon dioxide layer is deposited onto a substrate using a process gas comprising BDEAS and an oxygen-containing gas such as ozone. The silicon dioxide layer can be part of an etch-resistant stack that includes a resist layer. In another version, the silicon dioxide layer is deposited into through holes to form an oxide liner for through-silicon vias.

Abstract translation: 使用包含BDEAS和含氧气体如臭氧的工艺气体将二氧化硅层沉积到衬底上。 二氧化硅层可以是包括抗蚀剂层的抗蚀刻堆叠的一部分。 在另一个版本中，二氧化硅层被沉积到通孔中以形成用于通硅通孔的氧化物衬垫。

公开(公告)号：WO2009045964A1

公开(公告)日：2009-04-09

申请号：PCT/US2008/078162

申请日：2008-09-29

Applicant: APPLIED MATERIALS, INC. ,  SPULLER, Matthew ,  AGUSTIN, Melody ,  SHEK, Mei-Yee ,  XIA, Li-Qun ,  ARGHAVANI, Reza

Inventor： SPULLER, Matthew ,  AGUSTIN, Melody ,  SHEK, Mei-Yee ,  XIA, Li-Qun ,  ARGHAVANI, Reza

IPC: H01L21/20

CPC classification number: H01L21/31608 ,  C23C16/0272 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02304 ,  H01L27/11519 ,  H01L27/11521 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/7833

Abstract: The present invention generally provides apparatus and method for processing a semiconductor substrate. Particularly, embodiments of the present invention relate to a method and apparatus for forming semiconductor devices having a conformal silicon oxide layer formed at low temperature. One embodiment of the present invention provides a method for forming a semiconductor gate structure. The method comprises forming a gate stack on a semiconductor substrate, forming a conformal silicon oxide layer on the semiconductor substrate using a low temperature cyclic method, and forming a spacer layer on the conformal silicon oxide layer.

Abstract translation: 本发明通常提供了用于处理半导体衬底的装置和方法。 特别地，本发明的实施例涉及一种用于形成半导体器件的方法和装置，所述半导体器件具有在低温下形成的共形氧化硅层。 本发明的一个实施例提供一种形成半导体栅极结构的方法。 该方法包括在半导体衬底上形成栅堆叠，在半导体衬底上使用低温循环法形成共形氧化硅层，并在保形氧化硅层上形成间隔层。

公开(公告)号：WO2008094792A1

公开(公告)日：2008-08-07

申请号：PCT/US2008/051731

申请日：2008-01-22

Applicant: APPLIED MATERIALS, INC. ,  DEMOS, Alexandros T. ,  XIA, Li-Qun ,  KIM, Bok Hoen ,  WITTY, Derek R. ,  M'SAAD, Hichem

Inventor： DEMOS, Alexandros T. ,  XIA, Li-Qun ,  KIM, Bok Hoen ,  WITTY, Derek R. ,  M'SAAD, Hichem

IPC: H01L23/482 ,  H01L21/469

CPC classification number: H01L21/7682 ,  C23C16/401 ,  C23C16/56 ,  H01L21/02115 ,  H01L21/02126 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02351 ,  H01L21/02362 ,  H01L21/3146 ,  H01L21/31633 ,  H01L21/31695 ,  H01L21/76811 ,  H01L21/76835 ,  H01L2221/1047 ,  Y10S438/931

Abstract: Methods are provided for forming a structure that includes an air gap In one embodiment, a method is provided for forming a damascene structure compnses depositing a porous low dielectric constant layer by a method including reacting an organosilicon compound and a porogen-providing precursor, depositing a porogen-containing material, and removing at least a portion of the porogen -containing matenal, depositing an organic layer on the porous low dielectric constant layer by reacting the porogen-providing precursor, forming a feature defintion in the organic and dielectric constant layer, filling the feature definition with a conductive material, depositing a mask layer on the organic layer, forming apertures in the mask layer to expose the organic layer, removing a portion or all of the organic layer through the apertures, and forming an air gap adjacent the conductive matenal.

Abstract translation: 提供用于形成包括气隙的结构的方法。在一个实施例中，提供了一种用于形成镶嵌结构的方法，其包括通过包括使有机硅化合物和致孔剂提供前体反应的方法沉积多孔低介电常数层， 致孔剂材料，并且除去至少一部分含致孔剂的马氏体，通过使造孔剂提供前体反应，在有机和介电常数层中形成特征定义，将有机层沉积在多孔低介电常数层上，填充 具有导电材料的特征定义，在有机层上沉积掩模层，在掩模层中形成孔以暴露有机层，通过孔去除部分或全部有机层，以及形成邻近导电的气隙 matenal。

公开(公告)号：WO2006055459A3

公开(公告)日：2007-07-12

申请号：PCT/US2005041079

申请日：2005-11-10

Applicant: APPLIED MATERIALS INC ,  BALSEANU MIHAELA ,  JUNG KEE BUM ,  HUANG LIHUA LI ,  XIA LI-QUN ,  WANG RONGPING ,  WITTY DEREK R ,  STERN LEWIS ,  SEAMONS MARTIN JAY ,  M SAAD HICHEM ,  KWAN MICHAEL CHIU

Inventor： BALSEANU MIHAELA ,  JUNG KEE BUM ,  HUANG LIHUA LI ,  XIA LI-QUN ,  WANG RONGPING ,  WITTY DEREK R ,  STERN LEWIS ,  SEAMONS MARTIN JAY ,  M SAAD HICHEM ,  KWAN MICHAEL CHIU

IPC: H01L21/318 ,  C23C16/34 ,  C23C16/56 ,  H01L21/3105

CPC classification number: H01L21/3185 ,  C23C16/345 ,  C23C16/5096 ,  C23C16/56 ,  H01J37/32082 ,  H01L21/3105 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A stressed film is formed on a substrate. The substrate is placed in a process zone and a plasma is formed of a process gas provided in the process zone, the process gas having silicon-containing gas and nitrogen-containing gas. A diluent gas such as nitrogen can also be added. The as-deposited stressed material can be exposed to ultraviolet radiation or electron beams to increase the stress value of the deposited material. In addition or in the alternative, a nitrogen plasma treatment can be used to increase the stress value of the material during deposition. Pulsed plasma methods to deposit stressed materials are also described.

Abstract translation: 在基板上形成应力膜。 将基板放置在处理区中，并且等离子体由设置在处理区中的工艺气体形成，工艺气体具有含硅气体和含氮气体。 还可以加入稀释气体如氮气。 沉积的应力材料可以暴露于紫外线辐射或电子束以增加沉积材料的应力值。 另外或替代地，可以使用氮等离子体处理来增加沉积期间材料的应力值。 还描述了用于沉积应力材料的脉冲等离子体方法。

公开(公告)号：WO2006127463A3

公开(公告)日：2006-11-30

申请号：PCT/US2006/019459

申请日：2006-05-18

Applicant: APPLIED MATERIALS, INC. ,  BALSEANU, Mihaela ,  COX, Michael, S. ,  XIA, Li-Qun ,  SHEK, Mei-Yee ,  LEE, Jia ,  ZUBKOV, Vladimir ,  HUANG, Tzu-Fang ,  WANG, Rongping ,  ROFLOX, Isabelita ,  M'SAAD, Hichem

Inventor： BALSEANU, Mihaela ,  COX, Michael, S. ,  XIA, Li-Qun ,  SHEK, Mei-Yee ,  LEE, Jia ,  ZUBKOV, Vladimir ,  HUANG, Tzu-Fang ,  WANG, Rongping ,  ROFLOX, Isabelita ,  M'SAAD, Hichem

IPC: H01L21/314 ,  H01L21/318 ,  C23C16/34 ,  H01L21/8234 ,  H01L21/8238

Abstract: High tensile stress in a deposited layer such as silicon nitride, may be achieved utilizing one or more techniques, employed alone or in combination. High tensile stress may be achieved by forming a silicon-containing layer on a surface by exposing the surface to a silicon-containing precursor gas in the absence of a plasma, forming silicon nitride by exposing said silicon-containing layer to a nitrogen-containing plasma, and then repeating these steps to increase a thickness of the silicon nitride created thereby. High tensile stress may also be achieved by exposing a surface to a silicon-containing precursor gas in a first nitrogen-containing plasma, treating the material with a second nitrogen-containing plasma, and then repeating these steps to increase a thickness of the silicon nitride formed thereby. In another embodiment, tensile film stress is enhanced by deposition with porogens that are liberated upon subsequent exposure to UV radiation or plasma treatment.

公开(公告)号：WO2006026370A3

公开(公告)日：2006-03-09

申请号：PCT/US2005/030283

申请日：2005-08-24

Applicant: APPLIED MATERIALS, INC. ,  NOWAK, Thomas ,  XIA, Li-Qun ,  ROCHA-ALVAREZ, Juan Carlos ,  HOPPER, Brian ,  TRACHUK, Yuri ,  BALASUBRAMANIAN, Ganesh ,  RAJ, Daemian

Inventor： NOWAK, Thomas ,  XIA, Li-Qun ,  ROCHA-ALVAREZ, Juan Carlos ,  HOPPER, Brian ,  TRACHUK, Yuri ,  BALASUBRAMANIAN, Ganesh ,  RAJ, Daemian

IPC: C23C16/44 ,  H01L21/00 ,  B08B7/00

Abstract: A method and apparatus for cleaning a semiconductor manufacturing chamber comprising introducing a heteroatomic fluorine containing gas to a remote plasma source, disassociating the heteroatomic fluorine containing gas, forming diatomic fluorine, transporting gas from the remote plasma source into a processing region of the chamber, and ionizing the diatomic fluorine with an in situ plasma.

公开(公告)号：WO2005091348A1

公开(公告)日：2005-09-29

申请号：PCT/US2005/008445

申请日：2005-03-15

Applicant: APPLIED MATERIALS, INC. ,  HUANG, Lihua Li ,  HUANG, Tzu-Fang ,  SUGIARTO, Dian ,  XIA, Li-Qun ,  LEE, Peter Wai-Man ,  M'SAAD, Hichem ,  CUI, Zhenjiang ,  PARK, Sohyun

Inventor： HUANG, Lihua Li ,  HUANG, Tzu-Fang ,  SUGIARTO, Dian ,  XIA, Li-Qun ,  LEE, Peter Wai-Man ,  M'SAAD, Hichem ,  CUI, Zhenjiang ,  PARK, Sohyun

IPC: H01L21/316

CPC classification number: H01L21/31633 ,  C23C16/02 ,  C23C16/325 ,  C23C16/401 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/76801 ,  H01L21/7681 ,  H01L21/76826 ,  H01L21/76832

Abstract: Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including introducing an organosilicon compound and an oxidizing gas at a first ratio of organosilicon compound to oxidizing gas into the processing chamber, generating a plasma of the oxidizing gas and the organosilicon compound to form an initiation layer on a barrier layer comprising at least silicon and carbon, introducing the organosilicon compound and the oxidizing gas at a second ratio of organosilicon compound to oxidizing gas greater than the first ratio into the processing chamber, and depositing a first dielectric layer adjacent the dielectric initiation layer.

Abstract translation: 提供了用于处理用于沉积在两个低k电介质层之间具有低介电常数的粘合层的衬底的方法。 一方面，本发明提供一种处理基板的方法，包括以有机硅化合物的第一比例将有机硅化合物和氧化气体与氧化气体导入处理室，产生氧化气体的等离子体和有机硅化合物，形成 在至少包含硅和碳的阻挡层上的起始层，以有机硅化合物的第二比例将有机硅化合物和氧化气体与大于第一比例的氧化气体引入到处理室中，以及沉积与第 电介质起始层。