利索-全球专利检索

  1. Login
  2. Sign Up

Search Results

8 records (took 0.012 seconds)

    MEMRISTOR CELL READ MARGIN ENHANCEMENT
    1.
    发明申请
    MEMRISTOR CELL READ MARGIN ENHANCEMENT 审中-公开
    MEMRISTOR CELL阅读增强

    公开(公告)号：WO2016018220A1

    公开(公告)日：2016-02-04

    申请号：PCT/US2014/048448

    申请日：2014-07-28

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： BUCHANAN, Brent

    IPC: G11C11/16 ,  G11C7/10

    CPC classification number: G11C13/004 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/003 ,  G11C13/0069 ,  G11C2213/75

    Abstract: Memristor cell read margin enhancement employs programming switched memristor sub-bits of a memristor cell with a first resistive state to increase a relative read margin of the memristor cell. The switched memristor sub-bits of the memristor cell are connected in series. The read margin of the memristor cell is increased relative to a read margin of either of the switched memristor sub-bits.

    Abstract translation: 忆阻单元读取余量增强使用具有第一电阻状态的忆阻单元的编程开关忆阻器子位来增加忆阻单元的相对读取余量。 忆阻单元的开关忆阻器子位串联连接。 忆阻单元的读取余量相对于任一个开关忆阻器子位的读取余量而增加。

    CURRENT BEHAVIOR OF ELEMENTS
    2.
    发明申请
    CURRENT BEHAVIOR OF ELEMENTS 审中-公开
    元素的当前行为

    公开(公告)号：WO2016018281A1

    公开(公告)日：2016-02-04

    申请号：PCT/US2014/048800

    申请日：2014-07-30

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： BUCHANAN, Brent

    IPC: G11C5/14 ,  G11C7/06

    CPC classification number: G11C13/004 ,  G11C13/0002 ,  G11C13/0061 ,  G11C16/10 ,  G11C29/026 ,  G11C29/028 ,  G11C2013/0052 ,  G11C2213/15

    Abstract: An example device in accordance with an aspect of the present disclosure includes a first module, a second module, and a third module. The first module is coupled to an element whose status is to be determined, and the first module is to receive an input current that increases over time. The second module is to perform a temporal derivative of a voltage across the element. The third module is to provide an output signal based on a current behavior of the element, according to a change in voltage as a function of a change in current.

    Abstract translation: 根据本公开的一个方面的示例性设备包括第一模块，第二模块和第三模块。 第一模块耦合到要确定其状态的元件，并且第一模块将接收随时间增加的输入电流。 第二个模块是执行跨元件的电压的时间导数。 第三模块是根据电流的变化作为电流变化的函数，基于元件的电流行为来提供输出信号。

    REFERENCE CURRENTS FOR INPUT CURRENT COMPARISONS
    3.
    发明申请
    REFERENCE CURRENTS FOR INPUT CURRENT COMPARISONS 审中-公开
    输入电流比较的参考电流

    公开(公告)号：WO2016018247A1

    公开(公告)日：2016-02-04

    申请号：PCT/US2014/048580

    申请日：2014-07-29

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： BUCHANAN, Brent

    IPC: G11C7/06 ,  G11C5/14

    CPC classification number: G11C13/004 ,  G11C7/062 ,  G11C7/067 ,  G11C7/14 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2207/063

    Abstract: An example device in accordance with an aspect of the present disclosure includes a first module, a second module, and a third module. The first module is to compare an input current to a first reference current, and provide a first output. The second module is to compare the input current to a second reference current, and provide a second output. The third module is to compare the first output to the second output, and provide a third output indicative of a state associated with the input current.

    Abstract translation: 根据本公开的一个方面的示例性设备包括第一模块，第二模块和第三模块。 第一模块是将输入电流与第一参考电流进行比较，并提供第一输出。 第二模块是将输入电流与第二参考电流进行比较，并提供第二输出。 第三模块是将第一输出与第二输出进行比较，并提供指示与输入电流相关联的状态的第三输出。

    MEMRISTOR PROGRAMMING ERROR REDUCTION
    4.
    发明申请
    MEMRISTOR PROGRAMMING ERROR REDUCTION 审中-公开
    降低血压计编程错误

    公开(公告)号：WO2016018218A1

    公开(公告)日：2016-02-04

    申请号：PCT/US2014/048435

    申请日：2014-07-28

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： BUCHANAN, Brent

    IPC: G11C11/16 ,  G11C16/34

    CPC classification number: G11C13/0069 ,  G11C13/0007 ,  G11C27/00 ,  G11C29/52 ,  G11C29/70 ,  G11C29/785 ,  G11C2013/0092 ,  G11C2213/75

    Abstract: Error reduction in memristor programming includes programming an n-th switched memristor of a switched memristor array with an error-corrected target resistance. The error-corrected target resistance is a function of a resistance error of the switched memristor array and a target resistance of the n-th switched memristor. The n-th switched memristor programming is to reduce a total resistance error of the switched memristor array.

    Abstract translation: 忆阻器编程中的误差减少包括编程具有错误校正的目标电阻的开关忆阻器阵列的第n个开关忆阻器。 纠错目标电阻是开关忆阻器阵列的电阻误差和第n次开关忆阻器的目标电阻的函数。 第n次开关忆阻器编程是为了减少开关忆阻器阵列的总电阻误差。

    SWITCHED MEMRISTOR ANALOG-TO-DIGITAL CONVERSION
    5.
    发明申请
    SWITCHED MEMRISTOR ANALOG-TO-DIGITAL CONVERSION 审中-公开
    开关量器模拟数字转换

    公开(公告)号：WO2015163928A1

    公开(公告)日：2015-10-29

    申请号：PCT/US2014/035586

    申请日：2014-04-26

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： BUCHANAN, Brent

    IPC: H03M1/12

    CPC classification number: H03M1/808 ,  G11C2213/75 ,  H01L45/1253 ,  H01L45/145 ,  H03M1/78 ,  H03M1/785

    Abstract: Switched memristor digital-to-analog conversion employs a set of switch-selectable programmed resistances corresponding to a digital-to-analog conversion mapping to convert a digital input into an analog output. The digital input is to establish an analog resistance of a plurality of switched memristors connected in series that are switch selectable. The plurality of switched memristors is to provide the set of switch-selectable programmed resistances in accordance with the digital-to-analog conversion mapping.

    Abstract translation: 开关忆阻器数模转换采用一组对应于数 - 模转换映射的开关选择编程电阻，将数字输入转换为模拟输出。 数字输入是建立串联连接的多个切换式忆阻器的模拟电阻，其可选择开关。 多个开关式忆阻器将根据数模转换映射提供一组开关可编程电阻。

    REGULATING MEMRISTOR SWITCHING PULSES
    6.
    发明申请
    REGULATING MEMRISTOR SWITCHING PULSES 审中-公开
    调节脉冲开关脉冲

    公开(公告)号：WO2015167551A1

    公开(公告)日：2015-11-05

    申请号：PCT/US2014/036222

    申请日：2014-04-30

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： GE, Ning ,  YANG, Jianhua ,  GHOZEIL, Adam, L. ,  BUCHANAN, Brent

    IPC: G11C11/00 ,  H03K17/00

    CPC classification number: G11C13/0038 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C27/024 ,  G11C2013/0054 ,  G11C2013/0066 ,  G11C2013/0076 ,  G11C2013/0092

    Abstract: A device for regulating memristor switching pulses is described. The device includes a voltage source to supply a voltage to a memristor. The device also includes a voltage detector to detect a memristor voltage. The memristor voltage is based on an initial resistance state of the memristor and the voltage supplied by the voltage source. The device also includes a comparator to compare the memristor voltage with a target voltage value for the memristor. The device also includes a feedback loop to indicate to a control switch when the memristor voltage is at least equal to the target voltage value. The device also includes a control switch to cut off the memristor from the voltage source when the memristor voltage is at least equal to the target voltage value.

    Abstract translation: 描述了用于调节忆阻器切换脉冲的装置。 该装置包括用于向忆阻器提供电压的电压源。 该装置还包括检测忆阻器电压的电压检测器。 忆阻器电压基于忆阻器的初始电阻状态和由电压源提供的电压。 该器件还包括比较器，用于将忆阻器电压与忆阻器的目标电压值进行比较。 当存储器电压至少等于目标电压值时，该装置还包括反馈回路以向控制开关指示。 该装置还包括控制开关，当忆阻器电压至少等于目标电压值时，该开关用于从忆阻器与电压源切断。

Patent Agency Ranking