Abstract:
A power converter such that overvoltage at switching time is suppressed and the loss is lowered by means of a snubber circuit for a power semiconductor device and noise malfunction of the control circuit provided near the power semiconductor device due to high frequency current is suppressed. In the power converter in which first and second self-extinguishing semiconductor devices are connected in series between the terminals of a main power source in a bridge circuit, at least two capacitive elements are connected in series between one end of the bridge and the node of the semiconductor devices and a switching element which conducts when the capacitive elements shift to a charged state from a discharged state is provided in parallel with one of the capacitive elements. The other capacitive element is connected to both ends of the bridge through a resistance means.
Abstract:
An inverter type driving apparatus for variable-speed control of a motor, and more particularly to a motor driving apparatus which restricts an overcurrent and the stop of the apparatus due to the overcurrent at the start of the motor operation and during acceleration. This motor driving apparatus, for driving an inverter connected to a D.C. power source in accordance with a desired output voltage and a desired output frequency, includes a current detection circuit for detecting a current supplied to the inverter from the D.C. power source, an overcurrent limiting circuit for limiting a current flowing through an output stage power device of the inverter to a level below the overcurrent level in accordance with a command from the current detection circuit to continue the operation of the inverter, and a control circuit for changing the amplitude of a carrier wave of PWM control in accordance with the period or frequency of the operation of the overcurrent limiting circuit. Alternatively, the driving apparatus includes a current detection circuit for detecting a current supplied from the D.C. power source to the inverter, an overcurrent limiting circuit for limiting a current flowing through an output stage power device of the inverter to a level below the overcurrent level in accordance with a command from the current detection circuit to continue the operation of the inverter, and a controlling circuit for changing an output voltage or an output frequency in accordance with the period or frequency of the operation of the overcurrent limiting circuit, wherein the overcurrent limiting circuit includes a current polarity detection circuit for detecting the polarity of the current outputted from each phase of the inverter in accordance with the output voltage and an ON signal of an arm in each phase, and a judgement circuit for specifying an arm in accordance with the command of the current polarity detection circuit of each phase and turning OFF the specified arm when the current detection circuit detects the current limit value.
Abstract:
A graphics system in which processing speed can be improved by merely increasing the number of drawing mechanisms when an image containing a transparent object is generated. The graphics system comprises synthesizing means that includes a plurality of drawing mechanisms each comprising a geometric processor, a rendering processor and a frame memory for holding color, depth and weight information in a bit map form of a screen. The synthesizing means first compares the depth information from the color, depth and weight information of the same pixel position (the same address) read out from the frame memory of each drawing mechanism, multiplies the weight information by the color information from the figure on the front side, and generates a new pixel information, in this way, transparent objects can be merged.
Abstract:
A multi-projection image display device using a plurality of image projectors to form one picture on a screen, in which images projected from the projectors are smoothly connected with one another, so that seams of the images do not appear conspicuously. The image display device has projectors (0121, 0122, 0123, 0124) and a screen (0140) laid out in such a manner that maximum image projection ranges (0151, 0152, 0153, 0154) of the respective projectors ovelap the adjacent ranges. An image signal control unit (0110) for processing an image signal supplied from an external image input (0180) has, therein, a member for cutting out a partial image area dealt with by each projector, an image converting member for performing geometric transformation and local color correction of the partial image, and an arithmetic control member for controlling the image converting member on the basis of image information inputted from a screen state monitor camera (0130). With this structure, smoothing of the seams between the images may be realized simply by image signal processing, and precise adjustment of the optical system of the projectors becomes unnecessary.
Abstract:
The ratio BrOR of the residual magnetic flux density in a circumferential direction to the residual magnetic flux density in a radial direction is 0.95 - 1.05 and the ratio HcOR of the coercive force in a circumferential direction to the coercive force in a radial direction is 1.05 - 1.2 in the substrate surface of a magnetic recording medium. Therefore, a high output resolution, a low medium noise and a high track recording density are simultaneously achieved in recording at a high line recording density. When a magnetic storage apparatus is constituted by using a high S/N magnetic recording medium like this, a magnetic disc apparatus which has a high surface recording density, is low in cost and small in size, and a large capacity and a high reliability can be provided.
Abstract:
A method for developing a system board using a semiconductor integrated circuit device, wherein the development of a system board is made before the development of the circuit device used for the system board is actually acquired by verifying (S31 and S32) whether or not the system board meets the target specifications of the system board by carrying out simulation using a device model in which the functions of the circuit device are modeled by using a function describing language in such a way that the target specifications of the circuit device can be met and the description of the state of the external interface of the circuit device defined conformable to the target specifications. Since the device model in which the functions of the circuit device are described meets the target specifications of the circuit device, the device model is simulated together with the description of the interface state, whether or not the circuit part related to the description of the state of the interface, namely, the interface with the circuit device is appropriate can be verified from the results of the simulation, and the design of the system board can be carried out before the completion of the development of the circuit device or the device is acquired.
Abstract:
A high-frequency power amplifier circuit device, with the frequency of the operating band between 500 MHz and approximately 10 GHz and power level of not lower than 0.5 W, has a problem to be settled that no increase in power level can be expected in proportion to the increase in the gate width of a power transistor. In addition to the solution of the above problem, an optimal high-frequency power amplifier circuit device and a high-frequency transmission system using the device are constituted to reduce the space in the matching circuit, to improve the linearity and to prevent oscillation in a power transistor (10) and an input/output matching circuit in such a way that the grounds (2) and (4) of an input-side strip line (61) and output-side strip line (62) are separated from each other and the grounds (2) and (4) are respectively connected to an input-side ground electrode (24a) and output-side ground electrode (23a) provided on a semiconductor chip carrying the power transistor (10). Consequently, the effective source impedance component which has been the cause of the deterioration of high-frequency power amplifier circuit in mutual conductance can be reduced.
Abstract:
A door device for elevators, in which a door is hung by a door hanger and driven in a horizontal direction, is constructed such that two adjacent different planes connect the door and the door hanger to each other in order to provide a simple construction of the door device for elevators, in which a connection between the door and the door hanger is not easily bent.
Abstract:
Water quality control method used when hydrogen is injected into reactor water of a BWR plant. Even if low concentration hydrogen is injected, SCC of the core internals can be suppressed and, further, local corrosion can be avoided. A metal oxide which reacts as an oxidation catalyst of hydrogen is applied to the surfaces of the core internals of a boiling water reactor beforehand and then hydrogen is injected into the reactor water with which the core internals are in contact.
Abstract:
Optical signal communication equipment and optical communication system which can be suitably used even when the transmitting speed and capacity of information transmitted by using optical signals are increased. On the optical signal transmitting side, signal light is generated by causing induced emission in an active medium by supplying exciting light to the medium in accordance with transmitting signals. The exciting light is supplied to the active medium in such a way that naturally emitted light is made incident to a semiconductor layer and the component of the light having a specific wavelength is Bragg-reflected by modulating the refractive index of the semiconductor layer by impressing the voltage pulse correspdoning to the transmitting information upon the semiconductor layer, and then, the reflected light is supplied to the medium as the exciting light. Since the Bragg reflection and associated induced emission show excellent responsiveness to voltage signals having pulses widths of 1x10 second on shorter, an optical communication system which can transmit optical signals at a transmitting speed of up to 100 Gb/s can be realized.