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    MULTI-STACKED BBUL PACKAGE
    2.
    发明申请
    MULTI-STACKED BBUL PACKAGE 审中-公开
    多层BBUL包装

    公开(公告)号：WO2013176662A1

    公开(公告)日：2013-11-28

    申请号：PCT/US2012/039062

    申请日：2012-05-23

    Applicant: INTEL CORPORATION ,  GOH, Eng Huat ,  TEOH, Hoay Tien

    Inventor： GOH, Eng Huat ,  TEOH, Hoay Tien

    IPC: H01L23/48 ,  H01L23/12

    CPC classification number: H01L21/50 ,  H01L23/48 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24011 ,  H01L2224/24105 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/10253 ,  H01L2924/18162 ,  H05K1/185 ,  H05K3/4682 ,  H01L2924/00

    Abstract: A method including forming a first portion of a build-up carrier on at least one first die, the at least one first die; coupling at least one second die to the first portion of the build-up carrier, the at least one second die separated from the first die by the at least one layer of conductive material disposed between layers of dielectric material; and after coupling the at least one second die to the first portion of the build-up carrier, forming a second portion of the build-up carrier on the at least one second die. An apparatus including a build-up carrier including including alternating layers of conductive material and dielectric material and at least two dice therein in different planes of the build-up carrier.

    Abstract translation: 一种方法，包括在至少一个第一管芯上形成积聚载体的第一部分，所述至少一个第一管芯; 将至少一个第二管芯耦合到所述堆积载体的第一部分，所述至少一个第二管芯通过设置在介电材料层之间的所述至少一个导电材料层与所述第一管芯分离; 并且在将所述至少一个第二管芯耦合到所述堆积载体的第一部分之后，在所述至少一个第二管芯上形成所述堆积载体的第二部分。 一种包括积聚载体的装置，包括在积层载体的不同平面中包括交替的导电材料和介电材料层和至少两个骰子。

    THREE CAPACITOR STACK AND ASSOCIATED METHODS
    3.
    发明申请
    THREE CAPACITOR STACK AND ASSOCIATED METHODS 审中-公开
    三个电容堆叠和相关方法

    公开(公告)号：WO2018063632A1

    公开(公告)日：2018-04-05

    申请号：PCT/US2017/048824

    申请日：2017-08-28

    Applicant: INTEL CORPORATION

    Inventor： GOH, Eng Huat ,  SIR, Jiun Hann ,  CHUA, Han Kung ,  LIM, Min Suet ,  TEOH, Hoay Tien

    IPC: H01G4/38 ,  H01G4/30

    CPC classification number: H01L28/75

    Abstract: A three capacitor stack and associated methods are shown. An exemplary capacitor device may include a first capacitor stack that includes a first plurality of layers of reference electrodes interleaved with first capacitor electrodes, a second capacitor stack on the first capacitor stack that includes a second plurality of layers of reference electrodes interleaved with second capacitor electrodes, and a third capacitor stack on the second capacitor stack that includes a reference electrode and a third capacitor electrode. A respective layer of dielectric material is formed between the reference electrodes and the first capacitor electrodes, the second capacitor electrodes, and the third capacitor electrode.

    Abstract translation: 显示了三个电容器堆叠和相关的方法。 示例性电容器装置可以包括：第一电容器叠层，其包括与第一电容器电极交错的第一多个参考电极层;第一电容器叠层上的第二电容器叠层，其包括与第二电容器电极交错的第二多个参考电极层 以及在第二电容器堆叠上的第三电容器堆叠，其包括参考电极和第三电容器电极。 在参考电极和第一电容器电极，第二电容器电极和第三电容器电极之间形成相应的介电材料层。

    FPC CONNECTOR FOR BETTER SIGNAL INTEGRITY AND DESIGN COMPACTION
    4.
    发明申请
    FPC CONNECTOR FOR BETTER SIGNAL INTEGRITY AND DESIGN COMPACTION 审中-公开
    用于更好的信号完整性和设计压缩的FPC连接器

    公开(公告)号：WO2017003474A1

    公开(公告)日：2017-01-05

    申请号：PCT/US2015/038758

    申请日：2015-07-01

    Applicant: INTEL CORPORATION

    Inventor： GOH, Eng Huat ,  TEOH, Hoay Tien

    IPC: H01R12/77 ,  H01R13/639

    CPC classification number: H05K1/14 ,  H01R12/7058 ,  H01R12/77 ,  H01R12/78 ,  H01R12/88 ,  H05K1/028 ,  H05K2201/10037 ,  H05K2201/10356

    Abstract: A computer system assembly that includes a substrate and a first board mounted on the substrate. A flexible cable is secured to the first board. The computer system assembly further includes a second board mounted on the substrate. The second board includes a FPC connector. The FPC connector includes a body having a channel extending through the body such that the flexible cable may be positioned in the channel and pulled entirely through the body of the FPC connector. The FPC connector further includes a latching mechanism that secures the flexible cable within the channel once the flexible cable is pulled through the FPC connector. The first board and the second board are moved closer together as the flex cable is pulled through the FPC connector before at least one of the first board and the second board is mounted on the substrate.

    Abstract translation: 一种包括基板和安装在基板上的第一板的计算机系统组件。 柔性电缆固定在第一板上。 计算机系统组件还包括安装在基板上的第二板。 第二板包括FPC连接器。 FPC连接器包括具有延伸穿过本体的通道的本体，使得柔性电缆可以定位在通道中并且完全拉过FPC连接器的主体。 FPC连接器还包括锁定机构，一旦柔性电缆被拉动穿过FPC连接器，就将柔性电缆固定在通道内。 当第一板和第二板中的至少一个安装在基板上之后，当柔性电缆被拉过FPC连接器时，第一板和第二板移动得更靠近在一起。

    ELECTRONIC ASSEMBLY THAT INCLUDES A SUBSTRATE BRIDGE
    6.
    发明申请
    ELECTRONIC ASSEMBLY THAT INCLUDES A SUBSTRATE BRIDGE 审中-公开
    电子装配，包括基板桥

    公开(公告)号：WO2017082927A1

    公开(公告)日：2017-05-18

    申请号：PCT/US2015/060650

    申请日：2015-11-13

    Applicant: INTEL CORPORATION

    Inventor： GOH, Eng Huat ,  TEOH, Hoay Tien ,  GO, Jia Yan ,  ONG, Jenny Shio Yin

    IPC: H05K3/34 ,  H05K1/18

    CPC classification number: H05K3/3436 ,  H01L25/105 ,  H01L2224/81203 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H05K2201/10159 ,  H05K2201/10378 ,  H05K2201/1053 ,  H05K2201/10734 ,  Y02P70/613

    Abstract: The electronic assembly includes a printed circuit board; an electronic package that includes an electronic component mounted on a substrate, wherein the substrate is mounted to the printed circuit board; a first memory module mounted to the printed circuit board such that the first memory module is adjacent to the electronic package; a second memory module mounted to the printed circuit board; and a substrate bridge that electrically connects the first and second memory modules to the electronic package, wherein a lower surface of the substrate bridge is connected to an upper surface of the substrate and an upper surface of the first and second memory modules.

    Abstract translation: 该电子组件包括印刷电路板; 电子封装，其包括安装在基板上的电子部件，其中所述基板被安装到所述印刷电路板; 第一存储器模块，安装到所述印刷电路板，使得所述第一存储器模块与所述电子封装件相邻; 安装到所述印刷电路板的第二存储器模块; 以及将所述第一和第二存储器模块电连接到所述电子封装的衬底桥，其中所述衬底桥的下表面连接到所述衬底的上表面和所述第一和第二存储器模块的上表面。

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