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公开(公告)号：WO2018063415A1
公开(公告)日：2018-04-05
申请号：PCT/US2016/055082
申请日：2016-10-01
申请人： INTEL CORPORATION
发明人： LEE, Kyu Oh , LI, Yi , LIU, Yueli
IPC分类号： H01L23/00 , H01L23/488
CPC分类号： H01L24/16 , B23K35/0238 , B23K35/0244 , B23K35/24 , B23K35/262 , C22C13/00 , H01L23/00 , H01L23/49816 , H01L23/49866 , H01L24/13 , H01L24/81 , H01L2224/13109 , H01L2224/13111 , H01L2224/13155 , H01L2224/13247 , H01L2224/16227 , H01L2224/81203 , H01L2224/81815 , H01L2924/01029 , H01L2924/01049 , H01L2924/014 , H01L2924/01047
摘要： Embodiments are generally directed to indium solder metallurgy to control electro-migration. An embodiment of an electronic device includes a die; and a package substrate, wherein the die is bonded to the package substrate by an interconnection. The interconnection includes multiple interconnects, and wherein the interconnection includes a solder. The solder for the interconnection includes a combination of tin (Sn), copper (Cu), and indium (In).
摘要翻译： 实施例通常涉及铟焊料冶金学以控制电迁移。 电子设备的实施例包括管芯; 和封装基板，其中，所述管芯通过互连结合到所述封装基板。 互连包括多个互连，并且其中互连包括焊料。 用于互连的焊料包括锡（Sn），铜（Cu）和铟（In）的组合。
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2.发明申请
公开(公告)号：WO2017052652A1
公开(公告)日：2017-03-30
申请号：PCT/US2015/052475
申请日：2015-09-25
申请人： INTEL CORPORATION
发明人： JUN, Kimin , MUELLER, Brennen , FISCHER, Paul
IPC分类号： H01L25/065 , H01L23/48
CPC分类号： H01L23/48 , H01L21/6835 , H01L23/5389 , H01L24/05 , H01L24/08 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/73 , H01L24/80 , H01L24/81 , H01L24/82 , H01L24/92 , H01L25/0657 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2221/68354 , H01L2221/68368 , H01L2221/68381 , H01L2224/04 , H01L2224/05567 , H01L2224/08145 , H01L2224/13022 , H01L2224/131 , H01L2224/16145 , H01L2224/16147 , H01L2224/1703 , H01L2224/24146 , H01L2224/73201 , H01L2224/73209 , H01L2224/73251 , H01L2224/73259 , H01L2224/80006 , H01L2224/80099 , H01L2224/80201 , H01L2224/80203 , H01L2224/80213 , H01L2224/8083 , H01L2224/80895 , H01L2224/81005 , H01L2224/81099 , H01L2224/81191 , H01L2224/81201 , H01L2224/81203 , H01L2224/8121 , H01L2224/81815 , H01L2224/8183 , H01L2224/81895 , H01L2224/9212 , H01L2224/92124 , H01L2224/9222 , H01L2224/92224 , H01L2225/06513 , H01L2225/06517 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2225/06568 , H01L2924/10157 , H01L2924/00014 , H01L2224/80 , H01L2224/82 , H01L2224/19 , H01L2224/08 , H01L2924/014
摘要： Hybrid bonding is described for combining one semiconductor die with another. Some embodiments include attaching small dies on a wafer to a temporary carrier, aligning the dies over a plurality of larger host dies on a host wafer using the temporary carrier, applying the small dies against the host dies using the temporary carrier so that a subset of the small dies bond to respective host dies, separating the temporary carrier so that the subset of bonded small dies are attached to a respective host die and the remaining small dies are separated with the temporary carrier, singulating the host dies, and packaging the host dies.
摘要翻译： 描述了用于将一个半导体管芯与另一个半导体管芯组合的混合结合。 一些实施例包括将晶片上的小模具附接到临时载体上，使用临时载体将模具对准主晶片上的多个较大的主模具，使用临时载体将小模具施加到主模具上，使得 小型管芯与相应的主体管芯接合，分离临时载体，使得粘合的小型管芯的子集连接到相应的主管模具上，剩余的小型管芯与临时载体分离，分离主体模具，并将主体模具 。
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公开(公告)号：WO2016140818A2
公开(公告)日：2016-09-09
申请号：PCT/US2016/018801
申请日：2016-02-19
申请人： APPLE INC.
发明人： CHUNG, Chih-Ming , ZHAI, Jun , YANG, Yizhang
IPC分类号： H01L23/552 , H01L23/538 , H01L21/60 , H01L23/34 , H01L25/16
CPC分类号： H01L25/18 , H01L21/565 , H01L21/568 , H01L21/768 , H01L23/3107 , H01L23/34 , H01L23/36 , H01L23/3675 , H01L23/481 , H01L23/49816 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L23/552 , H01L24/14 , H01L24/19 , H01L24/32 , H01L24/97 , H01L25/0652 , H01L25/105 , H01L25/16 , H01L25/50 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/13024 , H01L2224/131 , H01L2224/13144 , H01L2224/16227 , H01L2224/27318 , H01L2224/2732 , H01L2224/27436 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/73267 , H01L2224/81005 , H01L2224/81203 , H01L2224/81815 , H01L2224/82031 , H01L2224/82039 , H01L2224/83005 , H01L2224/83191 , H01L2224/83855 , H01L2224/83862 , H01L2224/83874 , H01L2224/92225 , H01L2224/92244 , H01L2224/94 , H01L2224/97 , H01L2225/06548 , H01L2225/06555 , H01L2225/06589 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/12 , H01L2924/14 , H01L2924/1431 , H01L2924/1433 , H01L2924/1434 , H01L2924/1436 , H01L2924/15311 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19103 , H01L2924/19104 , H01L2924/19105 , H01L2924/3025 , H01L2924/3511 , H01L2924/014 , H01L2224/27 , H01L2224/83 , H01L2224/82 , H01L2224/81
摘要： Packages and methods of formation are described. In an embodiment, a system in package (SiP) includes first and second redistribution layers (RDLs), stacked die between the first and second RDLs, and conductive pillars extending between the RDLs. A molding compound may encapsulate the stacked die and conductive pillars between the first and second RDLs.
摘要翻译： 描述了包装和形成方法。 在一个实施例中，封装系统（SiP）包括第一和第二再分配层（RDL），第一和第二RDL之间的堆叠管芯，以及在RDL之间延伸的导电柱。 模塑料可以将堆叠的管芯和导电柱塞在第一和第二RDL之间。
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公开(公告)号：WO2016114318A1
公开(公告)日：2016-07-21
申请号：PCT/JP2016/050873
申请日：2016-01-13
申请人： デクセリアルズ株式会社
IPC分类号： H01L25/065 , H01L21/60 , H01L25/07 , H01L25/18 , H05K3/46
CPC分类号： H01L25/0657 , H01L23/544 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L25/50 , H01L2223/54426 , H01L2224/11003 , H01L2224/111 , H01L2224/13078 , H01L2224/131 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13157 , H01L2224/13164 , H01L2224/1319 , H01L2224/133 , H01L2224/1357 , H01L2224/13582 , H01L2224/136 , H01L2224/13644 , H01L2224/13655 , H01L2224/16058 , H01L2224/16146 , H01L2224/16227 , H01L2224/16235 , H01L2224/17107 , H01L2224/17181 , H01L2224/27003 , H01L2224/271 , H01L2224/27515 , H01L2224/2919 , H01L2224/2929 , H01L2224/29387 , H01L2224/32145 , H01L2224/32225 , H01L2224/33181 , H01L2224/73104 , H01L2224/73204 , H01L2224/81101 , H01L2224/81122 , H01L2224/8113 , H01L2224/81132 , H01L2224/81203 , H01L2224/81903 , H01L2224/83101 , H01L2224/83122 , H01L2224/8313 , H01L2224/83132 , H01L2224/83203 , H01L2224/83856 , H01L2224/9211 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06565 , H01L2225/06586 , H01L2225/06589 , H01L2924/00015 , H01L2924/3841 , H01L2224/83851 , H01L2224/81 , H01L2224/83 , H01L2924/00014 , H01L2924/014 , H01L2924/00012 , H01L2924/0635 , H01L2924/0665 , H01L2924/05442 , H01L2924/05432
摘要： 貫通電極を有する半導体基板が積層されている多層基板であって、導通特性に優れ、かつ低コストに製造できる多層基板が提供される。多層基板の平面視には、貫通電極が対向する位置に導電粒子が選択的に存在する。多層基板は、対向する貫通電極が導電粒子により接続され、該貫通電極が形成されている半導体基板同士が絶縁接着剤により接着している接続構造を有する。
摘要翻译： 提供了一种多层板，其包括具有通孔并层叠在一起的半导体板，并且具有优异的导电特性并且可以以低成本制造。 多层板包括在平面图中选择性地存在于通孔彼此相对的位置的导电颗粒。 在该多层板的连接结构中，相对的贯通电极通过导电性粒子连接，形成有贯通电极的半导体基板通过绝缘性粘合剂粘结在一起。
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5.发明申请
公开(公告)号：WO2016099523A1
公开(公告)日：2016-06-23
申请号：PCT/US2014/071327
申请日：2014-12-19
申请人： INTEL IP CORPORATION
IPC分类号： H01L25/065 , H01L23/48
CPC分类号： H01L23/49827 , H01L23/48 , H01L23/49811 , H01L23/528 , H01L23/5384 , H01L23/5389 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L25/065 , H01L25/16 , H01L25/18 , H01L2224/131 , H01L2224/13147 , H01L2224/16227 , H01L2224/2919 , H01L2224/32225 , H01L2224/73204 , H01L2224/81203 , H01L2224/81207 , H01L2224/81815 , H01L2224/83851 , H01L2224/92125 , H01L2225/06517 , H01L2225/06572 , H01L2924/10253 , H01L2924/1421 , H01L2924/1433 , H01L2924/1434 , H01L2924/1461 , H01L2924/15174 , H01L2924/15184 , H01L2924/15192 , H01L2924/15311 , H01L2924/19011 , H01L2924/19106 , H01L2924/014 , H01L2924/00014
摘要： The present disclosure describes embodiments of a stacked semiconductor device package and associated techniques and configurations. A package may include a packaging substrate having interconnects and a first semiconductor device attached to one side and a second semiconductor device attached to the opposite side. The devices may be attached in a flip chip configuration with pad sides facing each other on opposite sides of the substrate. The devices may be electrically coupled by the interconnects. The devices may be electrically coupled to fan out pads on the substrate. A dielectric layer may be coupled to the second side of the substrate and encapsulate the second device. Vias may route electrical signals from the fan out area through the dielectric layer and into a redistribution layer coupled to the dielectric layer. Other embodiments may be described and/or claimed.
摘要翻译： 本公开描述了堆叠的半导体器件封装和相关联的技术和配置的实施例。 封装可以包括具有互连的封装基板和附接到一侧的第一半导体器件和附接到相对侧的第二半导体器件。 这些器件可以以倒装芯片配置附接，其中焊盘侧面在衬底的相对侧上彼此面对。 这些器件可以通过互连电耦合。 这些器件可以电耦合到扇出衬底上的焊盘。 电介质层可以耦合到衬底的第二侧并封装第二器件。 通孔可以将来自风扇输出区域的电信号通过电介质层和耦合到电介质层的再分布层布置。 可以描述和/或要求保护其他实施例。
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公开(公告)号：WO2015198838A1
公开(公告)日：2015-12-30
申请号：PCT/JP2015/066349
申请日：2015-06-05
申请人： ソニー株式会社
CPC分类号： H01L24/16 , H01L21/563 , H01L23/12 , H01L23/49838 , H01L23/49866 , H01L24/81 , H01L25/0657 , H01L2224/13082 , H01L2224/13083 , H01L2224/13111 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/16013 , H01L2224/16055 , H01L2224/16057 , H01L2224/16113 , H01L2224/16225 , H01L2224/16227 , H01L2224/16237 , H01L2224/32225 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73204 , H01L2224/8112 , H01L2224/81203 , H01L2224/81815 , H01L2224/83192 , H01L2224/92125 , H01L2225/0651 , H01L2225/06517 , H01L2225/0652 , H01L2225/06562 , H01L2225/06572 , H01L2225/06586 , H01L2924/00014 , H01L2924/01028 , H01L2924/01046 , H01L2924/01079 , H01L2924/014 , H01L2924/15311 , H01L2924/15331 , H01L2924/15747 , H01L2924/181 , H05K3/3436 , H05K2201/0989 , H05K2201/099 , H05K2201/10674 , Y02P70/613 , H01L2924/00012 , H01L2224/45099
摘要： 半導体チップは、チップ本体と、チップ本体の素子形成面に設けられたはんだを含む複数の電極とを有する。パッケージ基板は、基板本体と、基板本体の表面に設けられた複数の配線およびソルダレジスト層とを有し、ソルダレジスト層は、基板本体の表面および複数の配線の上に連続層として設けられると共に、複数の配線の各々の上に開口を有する。はんだを含む複数の電極は、少なくとも一つの間隔制御電極を含み、少なくとも一つの間隔制御電極は、チップ本体の側から、柱状金属層と、はんだ層とを順に有すると共に、開口の開口端の一部または全部に、柱状金属層とソルダレジスト層とが重なるオーバーラップ領域を有する。
摘要翻译： 本发明的半导体芯片包括主芯片体和设置在所述主芯片体的元件形成表面上的多个焊料包含电极。 封装基板包括：主基板主体; 以及设置在所述主基板主体的表面上的多根导线和阻焊层。 阻焊层设置为主基板主体和多根电线表面上方的连续层，并且在每个所述电线上方具有开口。 多个含焊料的电极包括一个或多个间隔控制电极。 所述间隔控制电极中的每一个包括柱状金属层和焊料层，从相应于主芯片主体的一侧开始，并且在开口的全部或部分开口端具有重叠区域， 柱状金属层与上述阻焊层重叠。
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7.发明申请CONDUCTIVE CONNECTIONS RECESSED IN THROUGH-HOLES OF A DIELECTRIC AND CORRESPONDING MANUFACTURING METHODS 审中-公开电介质和相应制造方法贯穿孔中的导电连接
公开(公告)号：WO2015175557A1
公开(公告)日：2015-11-19
申请号：PCT/US2015/030413
申请日：2015-05-12
申请人： INVENSAS CORPORATION
IPC分类号： H01L21/60 , H01L23/485 , H01L21/48 , H01L23/498 , H01L23/31 , H01L21/56 , H01L21/98 , H01L25/10 , H01L25/065
CPC分类号： H01L23/49811 , B23K1/0016 , B23K35/0244 , B23K35/0266 , B23K35/22 , B23K2201/40 , B32B15/01 , H01L21/4853 , H01L21/56 , H01L21/563 , H01L21/565 , H01L23/3114 , H01L23/3135 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/73 , H01L24/742 , H01L24/81 , H01L24/82 , H01L24/83 , H01L24/98 , H01L25/0652 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/03 , H01L2224/03001 , H01L2224/03009 , H01L2224/03318 , H01L2224/0332 , H01L2224/0333 , H01L2224/03334 , H01L2224/0348 , H01L2224/03848 , H01L2224/03849 , H01L2224/039 , H01L2224/03901 , H01L2224/0391 , H01L2224/04105 , H01L2224/05022 , H01L2224/051 , H01L2224/05294 , H01L2224/05547 , H01L2224/05567 , H01L2224/05573 , H01L2224/05582 , H01L2224/056 , H01L2224/05794 , H01L2224/05839 , H01L2224/05844 , H01L2224/05847 , H01L2224/05855 , H01L2224/0603 , H01L2224/06102 , H01L2224/10145 , H01L2224/11001 , H01L2224/11005 , H01L2224/11009 , H01L2224/111 , H01L2224/11318 , H01L2224/1132 , H01L2224/11334 , H01L2224/1134 , H01L2224/11848 , H01L2224/11849 , H01L2224/119 , H01L2224/11901 , H01L2224/1191 , H01L2224/13005 , H01L2224/13017 , H01L2224/13018 , H01L2224/13021 , H01L2224/13022 , H01L2224/13082 , H01L2224/131 , H01L2224/13116 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/1319 , H01L2224/13294 , H01L2224/133 , H01L2224/13339 , H01L2224/13344 , H01L2224/13347 , H01L2224/13355 , H01L2224/13561 , H01L2224/13562 , H01L2224/13565 , H01L2224/136 , H01L2224/13609 , H01L2224/13611 , H01L2224/1403 , H01L2224/16058 , H01L2224/16059 , H01L2224/16145 , H01L2224/16147 , H01L2224/16148 , H01L2224/16227 , H01L2224/16238 , H01L2224/1701 , H01L2224/1703 , H01L2224/17181 , H01L2224/17505 , H01L2224/2101 , H01L2224/211 , H01L2224/2401 , H01L2224/2402 , H01L2224/24137 , H01L2224/24146 , H01L2224/2919 , H01L2224/32145 , H01L2224/73104 , H01L2224/73204 , H01L2224/73267 , H01L2224/75253 , H01L2224/81 , H01L2224/81138 , H01L2224/81141 , H01L2224/81193 , H01L2224/81203 , H01L2224/8121 , H01L2224/8122 , H01L2224/81224 , H01L2224/81815 , H01L2224/82005 , H01L2224/82101 , H01L2224/82102 , H01L2224/82105 , H01L2224/83 , H01L2224/8385 , H01L2224/9211 , H01L2225/06513 , H01L2225/1023 , H01L2225/1058 , H01L2924/00 , H01L2924/00012 , H01L2924/00014 , H01L2924/014 , H01L2924/07025 , H01L2924/15192 , H01L2924/15311 , H01L2924/15321 , H01L2924/3512 , H01L2924/381 , H01L2924/3841
摘要： In some embodiments, to increase the height-to-pitch ratio of a solder connection that connects different structures with one or more solder balls, only a portion (510) of a solder ball's (140) surface is melted when the connection is formed on one structure (110) and/or when the connection is being attached to another structure (HOB). The structure (110) may be an integrated circuit, an interposer, a rigid or flexible wiring substrate, a printed circuit board, some other packaging substrate, or an integrated circuit package. In some embodiments, solder balls (140.1, 140.2) are joined by an intermediate solder ball (140i), upon melting of the latter only. Any of the solder balls (140, 140i) may have a non-solder central core (140C) coated by solder shell (140S). Some of the molten or softened solder may be squeezed out, to form a "squeeze-out" region (520, 520A, 520B, 520.1, 520.2). In some embodiments, a solder connection (210) such as discussed above, on a structure (110A), may be surrounded by a dielectric layer (1210), and may be recessed in a hole (1230) in that layer (1210), to help in aligning a post (1240) of a structure (HOB) with the connection (210) during attachment of the structures (110A, HOB). The dielectric layer (1210) may be formed by moulding. The dielectric layer may comprise a number of layers (1210.1, 1210.2), "shaved" (partially removed) to expose the solder connection (210). Alternatively, the recessed solder connections (210) may be formed using a sublimating or vapourisable material (1250), placed on top of the solder (210) before formation of the dielectric layer (1210) or coating solder balls (140); in the latter case, the solder (140C) sinks within the dielectric material (1210) upon removal of the material (1250) and subsequent reflow. In some embodiments, the solder connections (210) may also be formed in openings (2220) in a dielectric layer (2210) (photoimageable polymer or inorganic) by solder paste printing and/or solder ball jet placement followed by reflow to let the solder sink to the bottom of the openings (2220), with possible repetition of the process and possible use of different solders in the different steps. The solder connections (210, 210.1, 210.2) may be used for bonding one or more structures (HOB, HOC) (e.g. an integrated circuit die or wafer, a packaging substrate or a package) to a structure (110A) (a wiring substrate) on which a die (HOB) is flip-chip connected. The solder connections (210, 210.1, 210.2) may differ from each other, in particular in height, which can be used for attaching a structure (HOB) with posts (1240) of different heights or for attaching two structures (HOB, HOC) in the case of a stepped form of the dielectric layer, one of the structures (HOC) being possibly placed higher than the other structure (HOB). In some embodiments, the structure (HOA) may be removed after bonding to the structures (HOB, HOC) and a redistribution layer (3210) may be formed to provide connecting lines (3220) connecting the solder connections (210) to contact pads (120R) and possibly interconnecting between the solder connections (210) and/or between the contact pads (120R).
摘要翻译： 在一些实施例中，为了增加将不同结构与一个或多个焊球连接的焊料连接的高度与间距比，当焊接球（140）表面的一部分（510）形成在 一个结构（110）和/或当连接被附接到另一个结构（HOB）时。 结构（110）可以是集成电路，插入器，刚性或柔性布线基板，印刷电路板，一些其它封装基板或集成电路封装。 在一些实施例中，焊料球（140.1,140.2）仅在熔化时被中间焊球（140i）连接。 任何焊球（140,140i）可以具有由焊料壳（140S）涂覆的非焊料中心芯（140C）。 一些熔融或软化的焊料可能被挤出，以形成“挤出”区域（520,520A，520B，520.1,520.2）。 在一些实施例中，在结构（110A）上的如上所述的焊料连接（210）可被电介质层（1210）包围，并且可以凹入该层（1210）中的孔（1230）中， 以在结构（110A，110B）的附接期间帮助将结构的柱（1240）与连接件（210）对齐。 电介质层（1210）可以通过模制形成。 介电层可以包括多个层（1210.1,1212.2），“剃光”（部分去除）以暴露焊料连接（210）。 或者，可以在形成电介质层（1210）或涂覆焊球（140）之前使用升华或蒸发的材料（1250）形成凹陷的焊料连接（210），放置在焊料（210）的顶部上。 在后一种情况下，当去除材料（1250）和随后的回流时，焊料（140C）在电介质材料（1210）内下沉。 在一些实施例中，焊料连接（210）还可以通过焊膏印刷和/或焊球喷射放置形成在电介质层（2210）（可光成像的聚合物或无机）中的开口（2220）中，然后回流以使焊料 沉入开口（2220）的底部，可能重复该过程并可能在不同步骤中使用不同的焊料。 焊接连接（210,210.1,210.2）可以用于将一个或多个结构（HOB，HOC）（例如，集成电路管芯或晶片，封装衬底或封装）结合到结构（110A）（布线基板 ），其上晶片（HOB）被倒装连接。 焊接连接（210,210.1,210.2）可以彼此不同，特别是在高度上可以不同，其可用于将结构（HOB）与不同高度的柱（1240）连接或用于附接两个结构（HOB，HOC） 在阶梯形状的电介质层的情况下，结构（HOC）中的一个可能被放置得高于其他结构（HOB）。 在一些实施例中，可以在结合到结构（HOB，HOC）之后去除结构（HOA），并且可以形成再分布层（3210），以提供将焊接连接（210）连接到接触焊盘的连接线（3220） 120R），并且可能在焊料连接（210）和/或接触焊盘（120R）之间互连。
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公开(公告)号：WO2015162405A1
公开(公告)日：2015-10-29
申请号：PCT/GB2015/051099
申请日：2015-04-10
申请人： ALPHA METALS, INC. , SETNA, Rohan P
发明人： SETNA, Rohan P , CHAKI, Nirmalya Kumar , ROY, Poulami Sengupta , SARKAR, Siuli , MUKHERJEE, Sutapa
CPC分类号： B22F9/24 , B22F1/0014 , B22F1/0074 , B22F1/025 , B22F9/04 , B22F2009/043 , B22F2301/10 , B22F2301/255 , C01P2004/20 , C01P2004/32 , C01P2004/51 , C01P2004/61 , C01P2006/11 , C01P2006/12 , C01P2006/80 , C09C1/62 , C09C1/622 , C09C1/627 , C09J1/00 , C09J9/02 , C09J11/04 , H01L24/27 , H01L24/29 , H01L24/81 , H01L24/83 , H01L2224/111 , H01L2224/1111 , H01L2224/1131 , H01L2224/11312 , H01L2224/1132 , H01L2224/11438 , H01L2224/1144 , H01L2224/11505 , H01L2224/13294 , H01L2224/13339 , H01L2224/13344 , H01L2224/13347 , H01L2224/13355 , H01L2224/13387 , H01L2224/1339 , H01L2224/13439 , H01L2224/1349 , H01L2224/13499 , H01L2224/16145 , H01L2224/16227 , H01L2224/271 , H01L2224/2711 , H01L2224/2731 , H01L2224/27312 , H01L2224/2732 , H01L2224/27438 , H01L2224/2744 , H01L2224/27505 , H01L2224/29011 , H01L2224/29139 , H01L2224/29147 , H01L2224/29294 , H01L2224/29339 , H01L2224/29344 , H01L2224/29347 , H01L2224/29355 , H01L2224/29387 , H01L2224/2939 , H01L2224/29439 , H01L2224/2949 , H01L2224/29499 , H01L2224/32145 , H01L2224/32227 , H01L2224/81191 , H01L2224/81192 , H01L2224/81203 , H01L2224/8121 , H01L2224/8184 , H01L2224/83191 , H01L2224/83192 , H01L2224/83203 , H01L2224/8321 , H01L2224/8384 , H01L2224/94 , H01L2924/12041 , H01L2924/00014 , H01L2924/0105 , H01L2924/01046 , H01L2924/01047 , H01L2924/01029 , H01L2924/01028 , H01L2924/0103 , H01L2924/0503 , H01L2924/01005 , H01L2924/00012 , H01L2224/27 , H01L2224/11 , H01L2224/83 , H01L2224/81
摘要： A method for manufacturing metal powder comprising: providing a basic metal salt solution; contacting the basic metal salt solution with a reducing agent to precipitate metal powder therefrom; and recovering precipitated metal powder from the solvent.
摘要翻译： 一种制造金属粉末的方法，包括：提供碱金属盐溶液; 使碱金属盐溶液与还原剂接触以从其中沉淀金属粉末; 并从溶剂中回收沉淀的金属粉末。
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公开(公告)号：WO2015147854A1
公开(公告)日：2015-10-01
申请号：PCT/US2014/032136
申请日：2014-03-28
发明人： DIAS, Rajendra, C. , DUBEY, Manish , ARMAGAN, Emre
CPC分类号： H01L24/81 , H01L21/4853 , H01L23/49811 , H01L23/5383 , H01L24/03 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/742 , H01L2224/0214 , H01L2224/0312 , H01L2224/0333 , H01L2224/0381 , H01L2224/0401 , H01L2224/05571 , H01L2224/10175 , H01L2224/11003 , H01L2224/113 , H01L2224/1132 , H01L2224/1147 , H01L2224/13007 , H01L2224/13017 , H01L2224/131 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13184 , H01L2224/1601 , H01L2224/16013 , H01L2224/16014 , H01L2224/16057 , H01L2224/16058 , H01L2224/16059 , H01L2224/16111 , H01L2224/16227 , H01L2224/16237 , H01L2224/16238 , H01L2224/742 , H01L2224/81193 , H01L2224/81203 , H01L2224/81385 , H01L2224/81439 , H01L2224/81444 , H01L2224/81447 , H01L2224/81484 , H01L2224/81815 , H01L2924/15192 , H01L2924/381 , H01L2924/3841 , H01L2924/40102 , H01L2924/00014 , H01L2924/014 , H01L2924/00012
摘要： A method for attaching an integrated circuit (IC) to an IC package substrate includes forming a solder bump on a bond pad of an IC die, forming a solder-wetting protrusion on a bond pad of an IC package substrate, and bonding the solder bump of the IC die to the solder-wetting protrusion of the IC package substrate.
摘要翻译： 一种将集成电路（IC）附着到IC封装基板的方法包括在IC芯片的焊盘上形成焊料凸块，在IC封装基板的焊盘上形成焊料润湿突起，并将焊料凸块 的IC管芯到IC封装衬底的焊料润湿突起。
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公开(公告)号：WO2015141342A1
公开(公告)日：2015-09-24
申请号：PCT/JP2015/053956
申请日：2015-02-13
申请人： デクセリアルズ株式会社
CPC分类号： C09J9/02 , C08K3/22 , C08K7/16 , C08K2003/0806 , C08K2201/001 , C08K2201/005 , C09J11/00 , C09J201/00 , H01B1/22 , H01L24/29 , H01L24/81 , H01L24/83 , H01L33/62 , H01L2224/14 , H01L2224/16225 , H01L2224/16238 , H01L2224/2929 , H01L2224/293 , H01L2224/29386 , H01L2224/2939 , H01L2224/29439 , H01L2224/29499 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49107 , H01L2224/73204 , H01L2224/73265 , H01L2224/81193 , H01L2224/81194 , H01L2224/81203 , H05K1/0203 , H05K1/111 , H05K3/323 , H05K3/34 , H05K2201/0221 , H05K2201/0266 , H05K2201/0272 , H05K2201/0391 , H05K2201/09427 , H05K2201/10106 , H05K2201/10469 , H05K2201/2054 , H01L2924/00014 , H01L2924/00
摘要： 高い放熱特性を得ることができる異方性導電接着剤を提供する。樹脂粒子の表面に導電性金属層が形成された導電性粒子（３１）と、導電性粒子よりも平均粒径が小さいはんだ粒子（３２）と、導電性粒子（３１）及びはんだ粒子（３２）を分散させるバインダーとを含有する。圧着時に導電性粒子（３１）が押圧により扁平変形して端子間を電気的に接続するとともに、導電性粒子（３１）よりも平均粒径が小さいはんだ粒子（３２）により端子間をはんだ接合するため、対向する端子間の接触面積が増加し、高い放熱特性を得ることができる。
摘要翻译： 提供了可以获得高散热性的各向异性导电粘合剂。 本发明包含：在树脂粒子的表面形成有导电性金属层的导电粒子（31） 焊料颗粒（32）具有比导电颗粒更小的平均尺寸; 和导电性粒子（31）和焊料粒子（32）分散的粘合剂。 导电颗粒（31）在卷曲期间被压制而变形为扁平形状，从而电连接端子。 此外，端子通过具有比导电颗粒（31）更小的平均尺寸的焊料颗粒（32）焊接。 结果，相对端子之间的接触面积增加，并且可以获得高的散热性能。
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