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    SURFACE NANOFABRICATION METHODS USING SELF-ASSEMBLED POLYMER NANOMASKS
    4.
    发明申请
    SURFACE NANOFABRICATION METHODS USING SELF-ASSEMBLED POLYMER NANOMASKS 审中-公开
    使用自组装聚合物纳米颗粒的表面纳米化方法

    公开(公告)号：WO2014116547A1

    公开(公告)日：2014-07-31

    申请号：PCT/US2014/012228

    申请日：2014-01-21

    Applicant: CORNING INCORPORATED ,  QUESADA, Mark Alejandro ,  WANG, Jianguo ,  ZHANG, Ying

    Inventor： QUESADA, Mark Alejandro ,  WANG, Jianguo ,  ZHANG, Ying

    IPC: G03F7/00

    CPC classification number: B05D5/00 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  Y10S977/888

    Abstract: Methods for fabricating a nanopillared substrate surface include applying a polymer solution containing an amphiphilic block copolymer and a hydrophilic homopolymer to a substrate surface. The amphiphilic block copolymer and the hydrophilic homopolymer in the polymer solution self-assemble on the substrate surface to form a self-assembled polymer layer having hydrophobic domains adjacent to the substrate surface and hydrophilic domains extending into the self-assembled polymer layer. At least a portion of the hydrophilic domains may be removed to form a plurality of pores in the exposed surface of the self-assembled polymer layer. A protective layer may be deposited on the exposed surface as a mask for etching through the plurality of pores to form through-holes. A nanopillar-forming material may be deposited onto the substrate surface via the through-holes. Then, the remaining portion of the self-assembled polymer layer may be removed to expose a nanopillared substrate surface.

    Abstract translation: 用于制造纳米圆柱形基底表面的方法包括将含有两亲嵌段共聚物和亲水均聚物的聚合物溶液施加到基底表面。 聚合物溶液中的两亲性嵌段共聚物和亲水均聚物自组装在基材表面上以形成具有与基材表面相邻的疏水区域和延伸到自组装聚合物层中的亲水区域的自组装聚合物层。 亲水区域的至少一部分可以被去除以在自组装聚合物层的暴露表面中形成多个孔。 可以在暴露的表面上沉积保护层作为用于通过多个孔蚀刻的掩模以形成通孔。 可以通过通孔将纳米柱形成材料沉积到衬底表面上。 然后，可以除去自组装聚合物层的剩余部分以暴露出纳米圆柱形的衬底表面。

    NETWORK-WIDE FLOW MONITORING IN SPLIT ARCHITECTURE NETWORKS
    6.
    发明申请
    NETWORK-WIDE FLOW MONITORING IN SPLIT ARCHITECTURE NETWORKS 审中-公开
    分布式架构网络中的网络流量监控

    公开(公告)号：WO2013038279A1

    公开(公告)日：2013-03-21

    申请号：PCT/IB2012/054030

    申请日：2012-08-07

    Applicant: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) ,  ZHANG, Ying

    Inventor： ZHANG, Ying

    IPC: H04L12/26

    CPC classification number: H04L43/026 ,  H04L43/04 ,  H04L43/0876 ,  H04L43/12

    Abstract: Flow monitoring tasks are assigned to a set of switches in a split architecture network to optimize network-wide flow monitoring. The assignment maximizes the number of monitored flows and reduces overhead of the flow monitoring. A controller receives an estimated traffic volume for each path in the network. The controller calculates, for all of the switches and all of the paths, sampling fractions that maximize the number of the flows sampled by the switches. In response to a request for setting up a new flow to traverse one of the paths in the network, the controller assigns the new flow to one of the switches that are located on the one of the paths, based on the sampling fraction for the assigned switch and the one of the paths, the bandwidth constraint and the memory constraint.

    Abstract translation: 分流架构网络中的一组交换机分配了流量监控任务，以优化全网络流量监控。 分配最大化监视流量的数量，并减少流量监控的开销。 控制器接收网络中每个路径的估计交通量。 控制器为所有交换机和所有路径计算采样分数，以使由交换机采样的流量数量最大化。 响应于设置新流程以遍历网络中的一条路径的请求，控制器基于所分配的采样分数将新流量分配给位于一条路径上的交换机之一 切换和路径之一，带宽约束和内存约束。

    METHOD FOR FABRICATING AN INTEGRATED CIRCUIT
    8.
    发明申请
    METHOD FOR FABRICATING AN INTEGRATED CIRCUIT 审中-公开
    制造集成电路的方法

    公开(公告)号：WO2011054560A1

    公开(公告)日：2011-05-12

    申请号：PCT/EP2010/062955

    申请日：2010-09-03

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED ,  DORIS, Bruce ,  ZHANG, Ying ,  CHENG, Kangguo

    Inventor： DORIS, Bruce ,  ZHANG, Ying ,  CHENG, Kangguo

    IPC: H01L21/265 ,  H01L21/28 ,  H01L21/336

    CPC classification number: H01L21/28132 ,  H01L21/26586 ,  H01L29/66787

    Abstract: A method for fabrication of features of an integrated circuit and device thereof include patterning a first structure on a surface of a semiconductor device and forming spacers about a periphery of the first structure. An angled ion implantation is applied to the device such that the spacers have protected portions and unprotected portions from the angled ion implantation wherein the unprotected portions have an etch rate greater than an etch rate of the protected portions. The unprotected portions and the first structure are selectively removed with respect to the protected portions. A layer below the protected portions of the spacer is patterned to form integrated circuit features.

    Abstract translation: 一种用于制造集成电路的特征的方法及其装置包括在半导体器件的表面上形成第一结构并在第一结构的周围形成间隔物。 将角度离子注入施加到器件，使得间隔物具有来自成角度离子注入的保护部分和未保护部分，其中未保护部分具有大于被保护部分的蚀刻速率的蚀刻速率。 相对于受保护部分，非保护部分和第一结构被选择性地去除。 将间隔物的受保护部分下面的层图案化以形成集成电路特征。

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