摘要:
In a SiC semiconductor device, the surface of a termination region is covered with a passivation film, and the passivation film comprises a thermal silicon oxide film which is in contact with the surface of the termination region, a first CVD silicon oxide film deposited on the thermal silicon oxide film so as to be in contact with the thermal silicon oxide film, and a second CVD silicon oxide film deposed on the first CVD silicon oxide film so as to be in contact with the first CVD silicon oxide film. By so doing, an electric field applied to the passivation film is relaxed, while production cost is reduced.
摘要:
A semiconductor device which includes: a first semiconductor layer (4) of a first conductivity type; a second semiconductor layer (2) of a second conductivity type that is formed near a surface of the first semiconductor layer (4); a first main electrode (11) that is electrically connected to the second semiconductor layer (2); a third semiconductor layer (6) of the second conductivity type that neighbors the first semiconductor layer (4) and is formed near a surface of the first semiconductor layer (4) opposite to the second semiconductor layer (2); a fourth semiconductor layer (7) of the first conductivity type that is selectively disposed in an upper portion of the third semiconductor layer (6); a second main electrode (14) that is electrically connected to the third semiconductor layer (6) and the fourth semiconductor layer (7); a trench (17) whose side face is in contact with the third semiconductor layer (6) and the fourth semiconductor layer (7), while reaching the first semiconductor layer (4); a gate electrode (9) that is formed along the side face of the trench (17) by a sidewall of polysilicon; and a polysilicon electrode (18) that is disposed away from the gate electrode (9) within the trench (17) and electrically connected to the second main electrode (14).
摘要:
Provided is an IGBT capable of achieving both low conduction loss and low switching loss in the IGBT and achieving low power consumption, and a power conversion device to which the IGBT is applied. The semiconductor device includes a first conductivity type semiconductor layer formed on a first main surface of a semiconductor substrate, a second conductivity type well region formed on the first main surface side and in contact with the first conductivity type semiconductor layer, a first gate electrode and a second gate electrode adjacent to each other across the second conductivity type well region and in contact with the first conductivity type semiconductor layer and the second conductivity type well region through a gate insulating film, a first conductivity type emitter region formed on the first main surface side of the second conductivity type well region, a second conductivity type power supply region that penetrates the first conductivity type emitter region and is electrically connected to the second conductivity type well region, an emitter electrode electrically connected to the second conductivity type well region through the second conductivity type power supply region, a second conductivity type collector layer formed on a second main surface side of the semiconductor substrate that is opposite to the first main surface side and in contact with the first conductivity type semiconductor layer, and a collector electrode electrically connected to the second conductivity type collector layer. An interval between the first gate electrode and the second gate electrode is narrower than an interval between the first gate electrode and another adjacent gate electrode and an interval between the second gate electrode and another adjacent gate electrode. Each of the first gate electrode and the second gate electrode is electrically connected to any of a switching gate wiring and a carrier control gate wiring. The number of gate electrodes connected to the carrier control gate wiring is larger than the number of gate electrodes connected to the switching gate wiring.
摘要:
The purpose of the present invention is to provide a power semiconductor device which has a light weight, high heat dissipation efficiency, and high rigidity. The power semiconductor device including a base 1, semiconductor circuits 2 which are arranged on the base 1, and a cooling fin 3 which cools each of the semiconductor circuits 2, in which one or more protruding portions 1a, 1b are formed on the base 1, widths of the protruding portions 1a, 1b in a direction parallel to the base 1 surface being longer than a thickness of the base 1, thereby providing power semiconductor devices 100, 200, 300, 400 which have a light weight, high heat dissipation efficiency, and high rigidity.
摘要:
Provided are a semiconductor device 200, 300 realized easily at low cost without requiring a complicated manufacturing process, and an alternator using the same. The semiconductor device 200, 300 includes a base having a base seat, a lead having a lead header, and an electronic circuit body 100, wherein the electronic circuit body 100 is arranged between the base and the lead; the base seat is connected to a first surface of the electronic circuit body 100; the lead header is connected to a second surface of the electronic circuit body 100; the electronic circuit body 100 is integrally covered by resin 16, including a transistor circuit chip 11 having a switching element 111, a control circuit chip 12 for controlling the switching element 111, a drain frame 14, and a source frame; either one of the drain frame and the source frame, and the base are connected; and the other one of the drain frame and the source frame, and the lead are connected.
摘要:
A rectifier including an autonomous type synchronous-rectification MOSFET is provided, which prevents chattering and through-current caused by a malfunction when a noise is applied. The rectifier (132) includes: a rectification MOSFET (101) for performing synchronous rectification; a determination circuit (103) configured to input a voltage between a pair of main terminals (TH, TL) of the rectification MOSFET (101), and to determine whether the rectification MOSFET (101) is in on or off state on the basis of the inputted voltage; and a gate drive circuit (105) configured such that a gate of the rectification MOSFET (101) is turned on and off by a comparison signal (Vcomp) from the determination circuit (103), and such that a time required to boost a gate voltage (Vgs) when the rectification MOSFET (101) is turned on is longer than a time required to lower the gate voltage (Vgs) when the rectification MOSFET (101) is turned off.
摘要:
A semiconductor device (200, 300, 400) includes a semiconductor substrate (108, 208) in which a semiconductor element (150) is formed, an electrode structure (151, 202, 207) provided on a first surface (108d) of the semiconductor substrate (108, 208) to be electrically connected to the semiconductor element (150) and in which a first Al metal layer (105) composed of Al or Al alloy, a Cu diffusion-prevention layer (107) composed of e.g. Ti, TiN, TiW or W, a second Al metal layer (106) composed of Al or Al alloy and a Ni, Cu or Cu alloy layer (104) are formed in this order, and a conductive member (102) which is bonded to the electrode structure (151, 202, 207) via a sintered copper layer (103) disposed on a surface (104a) of the Ni, Cu or Cu alloy layer (104). In this semiconductor device, a crystal plane orientation of Al crystal grains on a surface (106a) of the second Al metal layer (106) is principally on the (110) plane. The semiconductor device (200) may comprise a second electrode structure (152) on the second surface (108e) of the semiconductor substrate (108), also formed of the layers (105), (107), (106) and (104) and bonded to a conductive member (102) via a sintered copper layer (103). Alternatively, the semiconductor device (300, 400) may comprise a plurality of semiconductor elements such as transistors, diodes and resistive elements formed on a semiconductor LSI chip (201, 205, 206) and a plurality of input/output electrode pads (202, 207) each formed of the layers (105), (107), (106) and (104). The LSI chip (201, 205, 206) may be bonded to another semiconductor LSI chip (205, 206), also having electrode pads (202, 207) formed of the layers (105), (107), (106) and (104), and/or to a conductive member (102) via a sintered copper layer (103).