摘要:
A vertical power switching device, such as a vertical superjunction metal-oxide-semiconductor field-effect-transistor (MOSFET), in which termination structures in the corners of the integrated circuit are stretched to efficiently shape the lateral electric field. Termination structures in the device include such features as doped regions, field plates, insulator films, and high-voltage conductive regions and elements at the applied substrate voltage. Edges of these termination structures are shaped and placed according to a 2nd-order smooth, non-circular analytic function so as to extend deeper into the die corner from the core region of the device than a constant-distance path. Also disclosed are electrically floating guard rings in the termination region, to inhibit triggering of parasitic p-n-p-n structures.
摘要:
In a semiconductor device having a silicon carbide device, a technique capable of suppressing variation in a breakdown voltage and achieving reduction in an area of a termination structure is provided. In order to solve the above-described problem, in the present invention, in a semiconductor device having a silicon carbide device, a p-type first region and a p-type second region provided to be closer to an outer peripheral side than the first region are provided in a junction termination portion, a first concentration gradient is provided in the first region, and a second concentration gradient larger than the first concentration gradient is provided in the second region.
摘要:
A semiconductor device, in which, in a density distribution of first conductivity type impurities in the first conductivity type region 38 measured along a thickness direction of the semiconductor substrate 12, a local maximum value N1, a local minimum value N2, a local maximum value N3, and a density N4 are formed in this order from front surface side, a relationship of N1>N3>N2>N4 is satisfied, a relationship of N3/10>N2 is satisfied, and a distance "a" from the surface to the depth having the local maximum value N1 is larger than twice a distance "b" from the depth having the local maximum value N1 to the depth having the local minimum N2.
摘要:
Provided is a glass composition for protecting a semiconductor junction which contains at least SiO 2 , Al 2 O 3 , ZnO, CaO and 3 mol% to 10 mol% of B 2 O 3 , and substantially contains none of Pb, P, As, Sb, Li, Na and K. It is preferable that a content of SiO 2 falls within a range of 32 mol% to 48 mol%, a content of Al 2 O 3 falls within a range of 9 mol% to 13 mol%, a content of ZnO falls within a range of 18 mol% to 28 mol%, a content of CaO falls within a range of 15 mol% to 23 mol%, and a content of B 2 O 3 falls within a range of 3 mol% to 10 mol%. According to the glass composition for protecting a semiconductor junction of the present invention, a semiconductor device having a high withstand voltage can be manufactured by using a glass material which contains no lead in the same manner as a conventional case where "a glass material containing lead silicate as a main component" is used.
摘要:
Provided is a glass composition for protecting a semiconductor junction which contains at least SiO 2 , B 2 O 3 , Al 2 O 3 , ZnO and at least two oxides of alkaline earth metals selected from a group consisting of CaO, MgO and BaO, and substantially contains none of Pb, As, Sb, Li, Na and K, wherein an average linear expansion coefficient within a temperature range of 50°C to 550°C falls within a range of 3.33×10 -6 to 4.13×10 -6 . A semiconductor device having high breakdown strength can be manufactured using such a glass material containing no lead in the same manner as a conventional case where "a glass material containing lead silicate as a main component" is used.
摘要:
Provided is a highly conductive crystalline multilayer structure including a corundum-structured crystalline oxide thin film whose resistance has not increased even after annealing (heating). The crystalline multilayer structure includes a base substrate and the corundum-structured crystalline oxide thin film disposed directly on the base substrate or with another layer therebetween. The crystalline oxide thin film is 1 µm or more in a thickness and 80 mΩcm or less in an electrical resistivity. A semiconductor device includes the crystalline multilayer structure.