公开(公告)号：EP3108032B1

公开(公告)日：2018-12-12

申请号：EP15700572.9

申请日：2015-01-14

Applicant: Atotech Deutschland GmbH

Inventor： JANSSEN, Boris Alexander ,  LAUTAN, Donny

IPC: C23F1/02 ,  C23F1/44 ,  H05K3/18 ,  H05K3/24 ,  H05K3/26 ,  C23C18/18 ,  C23C18/32 ,  C23C18/50 ,  C23F1/30

CPC classification number: C23C18/32 ,  C23C18/1608 ,  C23C18/1841 ,  C23C18/42 ,  C23C18/50 ,  C23F1/02 ,  C23F1/30 ,  C23F1/44 ,  H05K3/187 ,  H05K3/244 ,  H05K3/26

Abstract: The present invention discloses a process for electroless plating of a metal or metal alloy onto copper features of an electronic device such as a printed circuit board which suppresses undesired skip plating and extraneous plating. The process comprises the steps i) providing such a substrate, ii) activating of the copper features with noble metal ions; iii) removing excessive noble metal ions or precipitates formed thereof with an aqueous pre-treatment composition comprising an acid, a source for halide ions and an additive selected from the group consisting of thiourea, thiourea derivatives and polymers comprising thiourea groups, and iv) electroless plating of a metal or metal alloy layer.

公开(公告)号：EP3270328A1

公开(公告)日：2018-01-17

申请号：EP17182828.8

申请日：2014-04-09

Applicant: Johnson Electric S.A.

Inventor： Demaso, Arthur ,  De Loi, Teck ,  Salle, Vincent

IPC: G06K19/077

CPC classification number: G06K19/07743 ,  G06K19/022 ,  G06K19/07722 ,  H01L23/49855 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/95 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/13019 ,  H01L2224/16227 ,  H01L2224/2731 ,  H01L2224/2732 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81395 ,  H01L2224/81455 ,  H01L2224/8149 ,  H01L2224/81903 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/9211 ,  H01L2224/95115 ,  H01L2924/15313 ,  H05K3/244 ,  H01L2924/00014 ,  H01L2924/0781 ,  H01L2224/81 ,  H01L2224/83

Abstract: A contact smart card (100, 101) comprises a smart card contact pad (10) and an IC chip (200, 300). The smart card contact pad 10 includes an imageable circuit substrate (12), a card-reader contact element (14) on a first side (16) of the imageable circuit substrate (12), and a, preferably flip-chip, connection element (18) on a second side (20) of the imageable circuit substrate (12) which is opposite the first side (16). The card-reader contact element (14) has a noble metal electrically conductive surface (30), and the connection element (18) has a chip terminal connection surface (36) which is not a noble metal. The IC chip (200, 300) is preferably flip-chip mounted at the second side (20) of the imageable circuit substrate (12) and electrically connected to the chip terminal connection surface (36). Furthermore, the chip terminal connection surface is preferably an organometallic electrically conductive corrosion protection layer.

Abstract translation: 接触式智能卡（100,101）包括智能卡接触垫（10）和IC芯片（200,300）。 智能卡接触垫10包括可成像电路基板（12），可成像电路基板（12）的第一侧（16）上的卡读取器接触元件（14），以及优选为倒装芯片的连接元件 （18）在所述可成像电路基板（12）的与所述第一侧（16）相对的第二侧（20）上。 读卡器接触元件（14）具有贵金属导电表面（30），并且连接元件（18）具有不是贵金属的芯片端子连接表面（36）。 IC芯片（200,300）优选倒装安装在可成像电路基板（12）的第二侧（20）处并电连接到芯片端子连接表面（36）。 此外，芯片端子连接表面优选为有机金属导电腐蚀保护层。

公开(公告)号：EP2829637B1

公开(公告)日：2017-09-20

申请号：EP13763959.7

申请日：2013-01-25

Applicant: JX Nippon Mining & Metals Corp.

Inventor： SHIBUYA,Yoshitaka ,  FUKAMACHI,Kazuhiko ,  KODAMA,Atsushi

IPC: C23C28/02 ,  C22C5/02 ,  C22C5/04 ,  C22C5/06 ,  C22C5/08 ,  C22C5/10 ,  C22C9/00 ,  C22C9/02 ,  C22C9/04 ,  C22C9/05 ,  C22C9/06 ,  C22C13/00 ,  C22C13/02 ,  C22C19/03 ,  C22C19/07 ,  H01B1/02 ,  H01R4/58 ,  H01R13/03 ,  H05K1/09 ,  H05K3/24

CPC classification number: H01B1/02 ,  B32B15/01 ,  B32B15/018 ,  C22C5/04 ,  C22C5/06 ,  C22C13/00 ,  C22C19/03 ,  C23C10/28 ,  C23C10/60 ,  C23C14/14 ,  C23C14/58 ,  C23C28/021 ,  H01R4/58 ,  H01R13/03 ,  H05K1/09 ,  H05K3/244 ,  Y10T428/12681 ,  Y10T428/12708 ,  Y10T428/12715 ,  Y10T428/12722

公开(公告)号：EP3108032A1

公开(公告)日：2016-12-28

申请号：EP15700572.9

申请日：2015-01-14

Applicant: Atotech Deutschland GmbH

Inventor： JANSSEN, Boris Alexander ,  LAUTAN, Donny

IPC: C23C18/18 ,  C23C18/32 ,  C23C18/50 ,  C23C18/16 ,  C23F1/30

CPC classification number: C23C18/32 ,  C23C18/1608 ,  C23C18/1841 ,  C23C18/42 ,  C23C18/50 ,  C23F1/02 ,  C23F1/30 ,  C23F1/44 ,  H05K3/187 ,  H05K3/244 ,  H05K3/26

Abstract: The present invention discloses a process for electroless plating of a metal or metal alloy onto copper features of an electronic device such as a printed circuit board which suppresses undesired skip plating and extraneous plating. The process comprises the steps i) providing such a substrate, ii) activating of the copper features with noble metal ions; iii) removing excessive noble metal ions or precipitates formed thereof with an aqueous pre-treatment composition comprising an acid, a source for halide ions and an additive selected from the group consisting of thiourea, thiourea derivatives and polymers comprising thiourea groups, and iv) electroless plating of a metal or metal alloy layer.

Abstract translation: 本发明公开了一种将金属或金属合金化学镀在电子器件例如印刷电路板的铜特征上的方法，该印刷电路板抑制不期望的跳过电镀和外部电镀。 该方法包括以下步骤：i）提供这种基材，ii）用贵金属离子活化铜特征; iii）用含有酸，卤离子源和选自硫脲，硫脲衍生物和包含硫脲基团的聚合物的添加剂的含水预处理组合物除去过量的贵金属离子或其形成的沉淀物，以及iv）无电解 电镀金属或金属合金层。

公开(公告)号：EP2931010A4

公开(公告)日：2016-08-03

申请号：EP13860808

申请日：2013-12-06

Applicant: TYCO ELECTRONICS AMP KOREA LTD

Inventor： CHOI YANG YOON ,  BEAK OK KY

IPC: H05K1/11 ,  H05K1/18 ,  H05K3/24 ,  H05K3/32 ,  H05K3/42 ,  H05K3/44 ,  H05K3/46

CPC classification number: H05K1/0213 ,  H05K1/092 ,  H05K1/116 ,  H05K1/182 ,  H05K3/244 ,  H05K3/325 ,  H05K3/423 ,  H05K3/429 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/0979 ,  H05K2201/1059 ,  H05K2201/1081 ,  H05K2203/0723 ,  H05K2203/073

公开(公告)号：EP1760783B1

公开(公告)日：2016-06-22

申请号：EP06252827.8

申请日：2006-05-31

Applicant: Hitachi Power Semiconductor Device, Ltd.

Inventor： Ikeda, Osamu ,  Nakamura, Masato ,  Matsuyoshi, Satoshi ,  Sasaki, Koji ,  Hiramitsu, Shinji

IPC: B23K35/26 ,  H01L23/48 ,  H05K3/34

CPC classification number: H05K3/3463 ,  B23K35/262 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/16 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/29211 ,  H01L2224/29311 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32507 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83801 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/13055 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H05K3/244 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01016 ,  H01L2924/01028 ,  H01L2924/01032 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929

公开(公告)号：EP2931010A1

公开(公告)日：2015-10-14

申请号：EP13860808.8

申请日：2013-12-06

Applicant: Tyco Electronics AMP Korea Ltd.

Inventor： CHOI, Yang Yoon ,  BEAK, Ok Ky

IPC: H05K1/18 ,  H05K3/32 ,  H05K3/46

CPC classification number: H05K1/0213 ,  H05K1/092 ,  H05K1/116 ,  H05K1/182 ,  H05K3/244 ,  H05K3/325 ,  H05K3/423 ,  H05K3/429 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/0979 ,  H05K2201/1059 ,  H05K2201/1081 ,  H05K2203/0723 ,  H05K2203/073

Abstract: Disclosed is a printed circuit board which can prevent the occurrence of damage to a component insertion hole or a broken electrical connection due to an impact during component insertion when components are mounted on the printed circuit board or any impact which occurs after component mounting. The printed circuit board comprises: a substrate having a circuit pattern formed thereon; a main hole which is formed so as for a component to be mounted on the substrate; and one or more secondary holes formed around the main hole, wherein the main hole and the secondary hole(s) may have the same electrical configuration.

Abstract translation: 本发明公开了一种印刷电路板，其能够防止在元件安装在印刷电路板上时元件插入期间由于冲击或者元件安装之后发生的任何冲击而导致元件插入孔损坏或电连接断开。 印刷电路板包括：其上形成有电路图案的基板; 主孔，其形成为使得要安装在基板上的部件; 以及围绕主孔形成的一个或多个次孔，其中主孔和次孔可具有相同的电气构造。

公开(公告)号：EP2816878A4

公开(公告)日：2015-10-07

申请号：EP13790895

申请日：2013-04-10

Applicant: NGK SPARK PLUG CO

Inventor： NISHIDA TOMOHIRO ,  MORI SEIJI ,  WAKAZONO MAKOTO

IPC: H05K3/34 ,  H01L23/12 ,  H01L23/498 ,  H05K3/28

CPC classification number: H05K1/0213 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/111 ,  H05K3/244 ,  H05K3/28 ,  H05K3/3452 ,  H05K2201/09881 ,  H05K2201/099 ,  H05K2203/0571 ,  H05K2203/0588 ,  H01L2924/00012 ,  H01L2924/00

公开(公告)号：EP2090145B1

公开(公告)日：2014-05-21

申请号：EP08735041.9

申请日：2008-04-04

Applicant: Atotech Deutschland GmbH

Inventor： HÜLSMANN, Thomas ,  SPARING, Christian ,  BRUNNER, Heiko ,  FROESE, Bernd

IPC: H05K3/38 ,  B32B7/04 ,  B32B15/14 ,  B32B15/20 ,  B32B27/26 ,  B32B27/04

CPC classification number: B32B7/04 ,  B32B15/14 ,  B32B15/20 ,  B32B27/04 ,  B32B27/26 ,  C08G77/04 ,  C09J4/00 ,  H05K3/244 ,  H05K3/389

Abstract: The invention provides silane compositions which are useful as adhesives, in particular in the preparation of multi-layer laminates such as printed circuit boards. The silane compositions comprise at least one coupling agent selected from the group consisting of (A-1) a silane coupling agent of the formula A (4-x) SiB x (wherein A is a hydrolyzable group, x is 1 to 3, and B is as defined in the description); (A-2) a silane coupling agent of the formula X-{B-[R-Si(A) 3 ] z } x (wherein X is a linear or branched hydrocarbon chain containing from 5 to 10 carbon atoms, B is a divalent or trivalent hetero atom, A is a hydrolyzable group and R, z and x are as defined in the description); (A-3) a tetraorgano silane coupling agent of the formula Si(OR) 4 (wherein R is hydrogen, alkyl, aryl, aralkyl, allyl or alkenyl); and (A-4) a water soluble silicate coupling agent characterized by the formula SiO 2 €¢ x M 2 O (wherein x is 1 to 4, and M is an alkali metal or ammonium ion); and (B) a colloidal silica; with the proviso that (a) said colloidal silica (B) is optional if at least one of compounds (A-3) or (A-4) is present; and (b) said colloidal silica (B) is mandatory if none of compounds (A-3) or (A-4) is present. The invention further provides the use of such silane compositions for the production of multilayer circuit boards and the multilayer circuit boards thus obtained.

公开(公告)号：EP2182097B1

公开(公告)日：2014-04-23

申请号：EP09155461.8

申请日：2009-03-18

Applicant: Rohm and Haas Electronic Materials LLC

Inventor： Morii, Yutaka

IPC: C23C18/48 ,  H05K3/34 ,  H05K3/24

CPC classification number: C09D7/1233 ,  C09D7/63 ,  C23C18/48 ,  C23C22/58 ,  C25D3/32 ,  C25D3/60 ,  H01L21/4835 ,  H05K3/22 ,  H05K3/244 ,  H05K3/3473 ,  H05K2201/0769 ,  H05K2203/0789 ,  H05K2203/122

Abstract: A tin or tin alloy plating film surface treatment aqueous solution that can reduce whiskers on the surface of a tin or tin alloy plating film, and can provide a favorable tin or tin alloy plating film using a simple method for tin or tin alloy plating films that are used on electronic components.