公开(公告)号：EP2428989A3

公开(公告)日：2015-07-29

申请号：EP11169866.8

申请日：2011-06-14

申请人： Fujitsu Limited

发明人： Masuda, Satoshi

IPC分类号： H01L23/057 ,  H01L23/66 ,  H01L23/498 ,  H01P1/04 ,  H01P5/02 ,  H01P3/00

CPC分类号： H01L23/057 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49861 ,  H01L23/66 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2223/6633 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/166 ,  H01L2924/167 ,  H01L2924/16787 ,  H01L2924/1903 ,  H01L2924/19033 ,  H01L2924/19039 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01P3/006 ,  H01P5/028 ,  H01L2924/00

摘要： A high-frequency circuit package including a dielectric substrate (10); a signal line (31), a first ground conductor layer (32), a second ground conductor layer (33), and a frame-shaped dielectric layer (16) formed on the dielectric substrate; a fourth ground conductor layer (35) formed on the frame-shaped dielectric layer; a first recess (29) formed in the frame-shaped dielectric layer and including a first (29b) surface and a second surface (29c) that are located above the first ground conductor layer (32) and the second ground conductor layer (33) and extend laterally at an oblique angle with respect to the length direction of the signal line; a first ground line (38a) formed on the first surface and electrically connecting the second ground conductor layer (33) with the fourth ground conductor layer (35); and a second ground line (38b) formed on the second surface and electrically connecting the third ground conductor layer (34) with the fourth ground conductor layer (35).

公开(公告)号：EP2645416A1

公开(公告)日：2013-10-02

申请号：EP13158337.9

申请日：2013-03-08

申请人： Fujitsu Limited

发明人： Masuda, Satoshi

IPC分类号： H01L23/498 ,  H01L23/66 ,  H01L25/065

CPC分类号： H01P3/02 ,  H01L23/047 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/66 ,  H01L25/0655 ,  H01L25/162 ,  H01L2223/6644 ,  H01L2223/6683 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2924/19107 ,  H05K1/021 ,  H05K1/0215 ,  H05K1/0243 ,  H05K1/141 ,  H05K3/4697 ,  H05K2201/1056 ,  H01L2924/00014

摘要： A stacked module includes a first multilayer substrate (6) including an opening (1X) having a stepwise wall face (1Y), andafirst transmissionline (18) including a first grounding conductor layer (17), a second multi layer substrate (2) supported on a stepped portion (1Z) of the stepwise wall face and including a second transmission line (15) including a second grounding conductor layer (14), a first chip (3) mounted on a bottom of the opening and coupled to a third transmission line (10) provided on the first multilayer substrate, and a second chip (4) mounted on the front face of the secondmultilayer substrate and coupled to the second transmission line. A face to which the second grounding conductor layer or a fourth grounding conductor layer coupled thereto is exposed is joined to the stepped portion to which the first grounding conductor layer or a third grounding conductor layer coupled thereto is exposed, and the first and second grounding conductor layers are coupled.

摘要翻译： 堆叠模块包括：第一多层基板（6），包括具有逐步壁面（1Y）的开口（1X）和包括第一接地导体层（17）的第一传输线（18），第二多层基板（2）被支撑 在所述阶梯式壁面的台阶部分（1Z）上并且包括第二传输线（15），所述第二传输线包括第二接地导体层（14），第一芯片（3）安装在所述开口的底部并且连接到第三传输 设置在第一多层基板上的线（10）和安装在第二多层基板的前表面上并耦合到第二传输线的第二芯片（4）。 第二接地导体层或与其连接的第四接地导体层露出的面接合到第一接地导体层或与其耦合的第三接地导体层露出的台阶部分，第一和第二接地导体 层耦合。

公开(公告)号：EP2360775B1

公开(公告)日：2013-04-03

申请号：EP11152090.4

申请日：2011-01-25

申请人： FUJITSU LIMITED

发明人： Masuda, Satoshi

IPC分类号： H03F3/195 ,  H03F3/24 ,  H03F1/56 ,  H01P5/02 ,  H03F3/60

CPC分类号： H01P5/028 ,  H01L23/66 ,  H01L2223/6655 ,  H01L2224/45144 ,  H01L2224/49175 ,  H01L2924/3011 ,  H01L2924/30111 ,  H03F1/56 ,  H03F3/195 ,  H03F3/245 ,  H03F3/602 ,  H03F2200/222 ,  H03F2200/255 ,  H03F2200/387 ,  H03F2200/423 ,  H03H7/38 ,  H01L2924/00

摘要： A transmission line having a plurality of branch lines that respectively include a first end part and a second end part and have a same line length, in which at least part of the plurality of branch lines includes bent shapes, the first end parts of the plurality of branch lines are connected to a common terminal, and the second end parts of the plurality of branch lines are connected to a common terminal. The plurality of branch lines may include two micro strip lines that are formed on substrates having the same dielectric constant and have bent shapes in symmetry with each other with respect to a straight line.

公开(公告)号：EP2360775A3

公开(公告)日：2011-09-21

申请号：EP11152090.4

申请日：2011-01-25

申请人： FUJITSU LIMITED

发明人： Masuda, Satoshi

IPC分类号： H01P5/02 ,  H03F3/60

CPC分类号： H01P5/028 ,  H01L23/66 ,  H01L2223/6655 ,  H01L2224/45144 ,  H01L2224/49175 ,  H01L2924/3011 ,  H01L2924/30111 ,  H03F1/56 ,  H03F3/195 ,  H03F3/245 ,  H03F3/602 ,  H03F2200/222 ,  H03F2200/255 ,  H03F2200/387 ,  H03F2200/423 ,  H03H7/38 ,  H01L2924/00

摘要： A transmission line having a plurality of branch lines that respectively include a first end part and a second end part and have a same line length, in which at least part of the plurality of branch lines includes bent shapes, the first end parts of the plurality of branch lines are connected to a common terminal, and the second end parts of the plurality of branch lines are connected to a common terminal. The plurality of branch lines may include two micro strip lines that are formed on substrates having the same dielectric constant and have bent shapes in symmetry with each other with respect to a straight line.