公开(公告)号：EP2980988A1

公开(公告)日：2016-02-03

申请号：EP15178690.2

申请日：2015-07-28

申请人： Skyworks Solutions, Inc.

发明人： BALTEANU, Florinel G. ,  MACEDO, Jose Alejandro ,  PINGOT, Jakub F.

IPC分类号： H03F1/02 ,  H03F3/08 ,  H03F3/195 ,  H03F3/24 ,  H03F3/68 ,  H03F3/72 ,  H02M1/14 ,  H02M3/00

CPC分类号： H03F1/0216 ,  H02M3/155 ,  H02M2001/0045 ,  H03F1/0222 ,  H03F1/0227 ,  H03F1/025 ,  H03F1/0255 ,  H03F1/0277 ,  H03F3/082 ,  H03F3/195 ,  H03F3/245 ,  H03F3/45071 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/102 ,  H03F2200/111 ,  H03F2200/429 ,  H03F2200/504 ,  H03F2200/511 ,  H03F2200/555 ,  H03F2200/78 ,  H03F2203/7209 ,  H03F2203/7221 ,  H03F2203/7236

摘要： A low frequency loss correction circuit that improves the efficiency of a power amplifier at near-DC low frequencies The low frequency loss correction circuit can include a signal error detection circuit configured to produce an error signal in response to detecting one or more frequency components of a tracking signal below a cutoff frequency that are substantially attenuated through a capacitive path. The low frequency loss correction circuit can include a drive circuit configured to convert the error signal into a low frequency correction signal, and provide the low frequency correction signal to a voltage supply line, the low frequency correction signal including at least some of the one or more frequency components of the tracking signal below a cutoff frequency that are substantially attenuated through the capacitive path.

摘要翻译： 一种低频损失校正电路，其提高近DC直流低频率下的功率放大器的效率低频损耗校正电路可以包括信号误差检测电路，其被配置为响应于检测到的一个或多个频率分量而产生误差信号 跟踪信号低于通过电容路径基本衰减的截止频率。 低频损失校正电路可以包括：驱动电路，被配置为将误差信号转换为低频校正信号，并将低频校正信号提供给电压供应线，所述低频校正信号包括所述低频校正信号中的至少一个或 跟踪信号的更多频率分量低于通过电容路径基本衰减的截止频率。

公开(公告)号：EP2854290A4

公开(公告)日：2016-01-27

申请号：EP12877471

申请日：2012-06-19

申请人： CHINA ELECTRONICS TECHNOLOGY GROUP CORP NO 55 RES INST

发明人： ZHANG BIN ,  TAO HONGQI

IPC分类号： H03F3/20 ,  H01L23/66 ,  H03F1/56

CPC分类号： H03F1/0205 ,  H01L23/66 ,  H01L2223/665 ,  H01L2223/6655 ,  H01L2223/6683 ,  H01L2924/0002 ,  H03F1/0283 ,  H03F1/565 ,  H03F3/193 ,  H03F3/195 ,  H03F3/21 ,  H03F3/211 ,  H03F3/245 ,  H03F2200/108 ,  H03F2200/171 ,  H03F2200/267 ,  H03F2200/391 ,  H01L2924/00

摘要： Provided is an amplifier circuit with cross wiring of direct-current signals and microwave signals, which includes: two branch sub-circuits (201, 202) being mirrors with each other and a third capacitor (2101) connected in parallel to an output end. The sub-circuit includes a direct-current feeding circuit and a microwave signal circuit. A transistor core drain power-up port (Vds) of a heterojunction field effect transistor (FET) of the direct-current feeding circuit is connected to a first micro-strip inductor (241) in series after passing through a first capacitor (281) connected in parallel, is respectively connected to one of a pair of third inductors (211, 212) in series by a pair of branched second inductors (231, 232), and is respectively connected to a transistor core drain port of the heterojunction FET. A pair of third inductors (211, 212) of the microwave signal circuit is respectively connected to one of a pair of first capacitors (251, 252) in series after respectively passing through one of a pair of second capacitors (221, 222) connected in parallel, is respectively connected to one of a pair of ground inductors (261, 262) in parallel, is respectively connected to one of a pair of fourth inductors (271, 272) in series, and is combined to be connected to an output end through a serially connected fifth inductor (291). The circuit has low sensitivity and a symmetrical circuit structure. Without a severely discontinuous region of an electromagnetic field, the layout density and the chip space utilization rate can be improved.

公开(公告)号：EP2728742B1

公开(公告)日：2015-08-05

申请号：EP14153708.4

申请日：2011-11-30

申请人： Sumitomo Electric Industries, Ltd.

发明人： Onishi, Masahiko

IPC分类号： H03F1/02 ,  H03F1/32 ,  H03F3/24 ,  H03F3/189

CPC分类号： H03F1/3258 ,  H03F1/0222 ,  H03F1/3241 ,  H03F1/3247 ,  H03F3/189 ,  H03F3/24 ,  H03F3/245 ,  H03F2200/102 ,  H03F2200/105 ,  H03F2200/336 ,  H03F2200/408 ,  H03F2200/504 ,  H03F2201/3209 ,  H03F2201/3224

公开(公告)号：EP2752990A4

公开(公告)日：2015-07-08

申请号：EP12827288

申请日：2012-08-29

申请人： UNIV ELECTRO COMMUNICATIONS

发明人： KAMIYAMA MASAHIRO ,  ISHIKAWA RYO ,  HONJO KAZUHIKO

IPC分类号： H03F1/02 ,  H03F3/20

CPC分类号： H03F3/21 ,  H03F1/0205 ,  H03F1/56 ,  H03F3/193 ,  H03F3/2171 ,  H03F3/245 ,  H03F3/601 ,  H03F2200/108 ,  H03F2200/222 ,  H03F2200/255 ,  H03F2200/306 ,  H03F2200/309 ,  H03F2200/315 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2200/399 ,  H03F2200/402 ,  H03F2200/423 ,  H03F2200/451

公开(公告)号：EP2880765A1

公开(公告)日：2015-06-10

申请号：EP13832356.3

申请日：2013-08-28

申请人： Crestcom, Inc.

发明人： MCCALLISTER, Ronald, D.

IPC分类号： H04B1/02

CPC分类号： H03F1/3247 ,  H03F1/0266 ,  H03F3/193 ,  H03F3/245 ,  H03F2200/102

摘要： A transmitter (20) includes a peak reduction section (30), a predistorter (98), and an amplifying section (102) biased by a variable bias signal generator (118). The peak reduction section (30) is controlled by a signal magnitude threshold (36) that defines maximum magnitudes for local peaks (32) of a reduced-peak communication signal (38). The bias signal generator (118) is controlled by a bias control signal (110). Both the signal magnitude threshold (36) and the bias control signal (110) are derived from a common reduced bandwidth (50) peak-tracking signal (42). The peak-tracking signal (42) is derived from an inflated-peak communication signal (26). The predistorter (98) applies distortion to the reduced-peak communication signal (38) that is configured, at least in part, by the bias control signal (110).

公开(公告)号：EP2854288A3

公开(公告)日：2015-04-29

申请号：EP14191308.7

申请日：2012-07-17

申请人： Ericsson Modems SA

发明人： Lindstrand, Jonas ,  Bryant, Carl ,  Sjöland, Henrik

IPC分类号： H03F1/56 ,  H03F1/52 ,  H03F3/217 ,  H03F3/24 ,  H03F3/45

CPC分类号： H03F1/523 ,  H03F1/565 ,  H03F3/2171 ,  H03F3/245 ,  H03F3/45188 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2203/45318 ,  H03F2203/45332 ,  H03F2203/45396 ,  H03F2203/45631 ,  H03F2203/45638 ,  H03H7/38

摘要： A matching unit (200) configured to match a load of an amplifier circuit to an external circuit. The matching unit (200) comprises a first reactance configured to generate a first positive reactance at low frequencies and a second positive reactance at high frequencies. A second reactance unit comprises at least one series capacitor (C s ) and at least one series inductor (L s ) serially coupled between a resistor (R L ) and the first and second outputs of the amplifier. The second reactance unit is configured to generate a negative reactance at low frequencies and a third positive reactance at high frequencies; and a third reactance unit configured to generate a short at high frequencies so as to reduce a parasitic capacitance at the first and second outputs of the amplifier at high frequencies, wherein said first, second, and third reactance units are configured to operate together to provide a generally constant impedance across a wideband frequency range.

摘要翻译： 匹配单元（200），被配置为将放大器电路的负载匹配到外部电路。 匹配单元（200）包括被配置为产生低频下的第一正电抗和高频下的第二正电抗的第一电抗。 第二电抗单元包括串联耦合在电阻器（RL）与放大器的第一和第二输出端之间的至少一个串联电容器（Cs）和至少一个串联电感器（Ls）。 第二电抗单元被配置为产生低频负电抗和高频第三正电抗; 以及第三电抗单元，所述第三电抗单元被配置为在高频下产生短路以便以高频率减小放大器的第一和第二输出处的寄生电容，其中所述第一，第二和第三电抗单元被配置为一起操作以提供 宽带频率范围内的阻抗通常恒定。

公开(公告)号：EP2793394A4

公开(公告)日：2015-04-29

申请号：EP12858137

申请日：2012-11-09

申请人： PANASONIC CORP

发明人： OKAJIMA TOSHIYUKI

IPC分类号： H03F1/52 ,  H03F3/24

CPC分类号： H03F3/213 ,  H03F1/0261 ,  H03F1/523 ,  H03F3/193 ,  H03F3/195 ,  H03F3/245 ,  H03F3/72 ,  H03F2200/108 ,  H03F2200/15 ,  H03F2200/18 ,  H03F2200/181 ,  H03F2200/451 ,  H03F2200/471 ,  H03F2200/555 ,  H03F2203/7206 ,  H03F2203/7221 ,  H03F2203/7227

摘要： A high-output electric power amplifier using a depression-type FET includes a drain voltage supply portion 120, 220, and 320 adapted to create a positive voltage to be applied to a drain terminal in the depression-type FET, and a gate bias voltage supply portion 130, 230, and 330 adapted to create a negative voltage to be applied to a gate terminal in the depression-type FET, wherein the drain voltage supply portion uses an external commercial power supply as an electric power source, and the gate bias voltage supply portion uses a battery as an electric power source, in order to certainly prevent breakdowns of the FET due to excessive electric currents.

公开(公告)号：EP2858251A1

公开(公告)日：2015-04-08

申请号：EP12878006.1

申请日：2012-05-29

申请人： Fujitsu Limited

发明人： MATSUBARA, Satoshi ,  HAMANO, Mitsuharu ,  SHAKO, Hideharu

IPC分类号： H04B1/04 ,  H03F1/32 ,  H03F3/20

CPC分类号： H03F1/3247 ,  H03F1/3241 ,  H03F3/189 ,  H03F3/21 ,  H03F3/245 ,  H03F2200/336 ,  H03F2200/465 ,  H03F2201/3215 ,  H03F2201/3227 ,  H03F2201/3233 ,  H04B1/0475 ,  H04B2001/0425

摘要： A distortion-compensation-coefficient storage unit (33) stores a distortion compensation coefficient. An address generating unit (31) takes a logarithm of power of an input signal, and exponentiates the value obtained by taking a logarithm, and selects a distortion compensation coefficient stored in the distortion-compensation-coefficient storage unit (33) according to the value obtained by exponentiation. A pre-distortion unit (32) acquires the selected distortion compensation coefficient from the distortion-compensation-coefficient storage unit (33), and perform distortion compensation processing on the signal input to the address generating unit (31) using the acquire distortion compensation coefficient. An amplifier amplifies the signal subjected to the distortion compensation processing. The distortion-compensation-coefficient calculating unit (34) updates a distortion compensation coefficient that is stored in the distortion-compensation-coefficient storage unit (33) based on an amplified transmission signal and a signal input to the address generating unit (31).

摘要翻译： 失真补偿系数存储单元（33）存储失真补偿系数。 地址生成单元（31）取输入信号的幂的对数，并且将通过取对数获得的值进行指数，并根据该值来选择存储在失真补偿系数存储单元（33）中的失真补偿系数 通过取幂获得。 预失真单元（32）从失真补偿系数存储单元（33）获取所选择的失真补偿系数，并使用获取失真补偿系数对输入到地址生成单元（31）的信号进行失真补偿处理 。 放大器放大经过失真补偿处理的信号。 失真补偿系数计算单元（34）基于放大的发送信号和输入到地址生成单元（31）的信号来更新存储在失真补偿系数存储单元（33）中的失真补偿系数。

公开(公告)号：EP2858240A1

公开(公告)日：2015-04-08

申请号：EP12878066.5

申请日：2012-05-29

申请人： NEC Corporation

发明人： MURAO Yoji

IPC分类号： H03F3/68 ,  H03F1/07

CPC分类号： H03F1/0288 ,  H03F3/189 ,  H03F3/211 ,  H03F3/245 ,  H03F3/602 ,  H03F3/68 ,  H03F2203/21106 ,  H03F2203/21157

摘要： A multiple-series amplifying device (100) of the present invention includes multiple series of amplifiers (110, 120) which are formed in parallel so as to input and output signals individually. Each of multiple-series of amplifiers (110, 120) includes a plurality of semiconductor amplifying elements (111, 112, 121, 122) which are driven in parallel so as to amplify signals. A pair of semiconductor amplifying elements (112, 121) adjoining together in a pair of amplifiers (110, 120) is formed in a single package (130).

摘要翻译： 本发明的多系列放大装置（100）包括多个并联形成的放大器（110,120），以分别输入和输出信号。 多系列放大器（110,120）中的每一个包括并联驱动以放大信号的多个半导体放大元件（111,112,121,122）。 一对放大器（110,120）中邻接在一起的一对半导体放大元件（112,121）形成在单个封装（130）中。

公开(公告)号：EP2858239A1

公开(公告)日：2015-04-08

申请号：EP13794743.8

申请日：2013-04-05

申请人： NEC Corporation

发明人： HORI, Shinichi

IPC分类号： H03F3/217 ,  H03F1/02 ,  H03K17/687 ,  H04B1/04

CPC分类号： H03F3/2171 ,  H03F1/0216 ,  H03F1/0244 ,  H03F3/193 ,  H03F3/217 ,  H03F3/2173 ,  H03F3/245 ,  H03F2200/171 ,  H03F2200/324 ,  H03F2200/336 ,  H03F2200/405 ,  H03K17/687

摘要： The present invention is applied to a switching amplifier that includes a first high-side gate and a first low-side gate having output terminals connected together, and a high-side driver and a low-side driver that drive the first high-side gate and the first low-side gate, respectively. In the switching amplifier of the present invention, the high-side driver includes an input switching amplifier that uses the output terminal of the first high-side gate as a power source.

摘要翻译： 本发明应用于开关放大器，该开关放大器包括具有连接在一起的输出端子的第一高侧栅极和第一低侧栅极以及驱动第一高侧栅极的高侧驱动器和低侧驱动器 和第一个低侧栅极。 在本发明的开关放大器中，高侧驱动器包括使用第一高侧栅极的输出端子作为电源的输入开关放大器。