公开(公告)号：EP0652649A3

公开(公告)日：1999-09-15

申请号：EP94117233.0

申请日：1994-11-02

申请人： MOTOROLA, INC.

发明人： Diekelman, Dennis Paul

IPC分类号： H04B7/185

CPC分类号： H04B7/18539

摘要： A method for managing resource usage within a cellular communications system (10) having at least one satellite (12) and, capable of communicating with the satellite(s) (12), at least one controlling station (28) and multiple ground terminals (26). The controlling station (28) predicts (372, 380) system communication traffic and operating capabilities for a future period; generates (216) a system plan (250) and an individual operational plan (270-30n) for each satellite (12) based on the prediction; distributes (222) each individual operational plan (270-30n) to each corresponding satellite (12); monitors (226) execution of the system plan (250) during the future period to determine (228) whether the plan is operating acceptably and when the plan is not operating acceptably (228), generates (216) a new plan, or portion thereof, to alleviate the unacceptable operation; and repeats the foregoing steps for additional future periods. Each satellite (12) receives (502), stores (504), executes (224) and monitors execution (226) of its individual operational plan (270-30n) and transmits out-of-plan messages (338) to the controlling station (28) when it detects an out-of-plan condition (336).

公开(公告)号：EP0731505A3

公开(公告)日：1998-04-15

申请号：EP96103053.3

申请日：1996-02-29

申请人： MOTOROLA, INC.

发明人： Bailey, Keith Woodvel

IPC分类号： H01L23/495

CPC分类号： H01L24/06 ,  H01L23/49562 ,  H01L23/49582 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/0603 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/48799 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/00 ,  H01L2224/48824 ,  H01L2924/00015 ,  H01L2924/00012

摘要： A semiconductor leadframe structure (11,41) includes a die bond portion (12) and a plurality of leads (13) coupled to the die bond portion (12). The leadframe structure (11) comprises a metal (23) such as copper or a copper alloy. At least one lead (28,29) includes a bond post (31) that has a major surface (32) for forming a wire bond. The major surface (32) includes an exposed area (33) of leadframe metal (23) and a covered area (34) of another metal (24) deposited onto the leadframe metal (23).

公开(公告)号：EP0750316A3

公开(公告)日：1998-04-08

申请号：EP96109958.7

申请日：1996-06-20

申请人： MOTOROLA LTD

发明人： Bennett, Irwin ,  Page, Andrew ,  King, Barry ,  Golding, Paul

IPC分类号： G11C19/00

CPC分类号： G06F9/30032 ,  G06F7/584 ,  G06F2207/581 ,  G06F2207/583 ,  G11C19/00 ,  H04L9/0662 ,  H04L2209/04 ,  H04L2209/12

摘要： A feedback and shift unit is arranged to reduce to a minimum the number of processing steps required in a processor, such as a DSP, to achieve a particular operating function, such as a linear feedback shift or a stepping function used by encryption algorithms. The feedback and shift unit (50) comprises a linear feedback shift register (52) for storing a value of the feedback and shift unit. A tap register (56) stores a tap position indicator indicative of tap positions for the feedback and shift unit (50). An input provides data to the feedback and shift unit. A feedback matrix, coupled to receive the data from the input, provides data bits, generated in response to the data and the tap position indicator, that are shifted into the linear feedback shift register (52) to form the value stored therein.

公开(公告)号：EP0766362A3

公开(公告)日：1998-04-01

申请号：EP96115213.9

申请日：1996-09-23

申请人： MOTOROLA, INC.

发明人： Motter, Chang Su

IPC分类号： H02H9/02 ,  H02H5/04

CPC分类号： H02H9/025 ,  H02H3/025 ,  H02H3/087 ,  H02H5/042 ,  H02H7/18

摘要： A protection element (10) protects a battery pack (36) from potential faulty conditions in a load (38). The protection element (10) includes a switch (12), a control FET (14), and three resistors (16, 18, and 22). Under normal operating conditions, the switch (12) is conductive and the control FET (14) is non-conductive. If a short circuit is detected, the controller(14) becomes conductive and turns off the switch (12). The switch (12) remains non-conductive until the load (38) is disconnected from the protection element (10). The protection element (10) further includes a temperature sensor (24) that turns off the switch (12) at high temperatures and a current limiting element (28) that imposes an upper limit on the current flowing through the protection element (10). Control signals can be applied to the gate electrodes of the switch (12) and the control FET (14) to modulate the current in the protection element (10).

公开(公告)号：EP0760515A3

公开(公告)日：1998-01-07

申请号：EP96113642.1

申请日：1996-08-26

申请人： MOTOROLA, INC.

发明人： Tai, Jy-Der D.

IPC分类号： G11C11/22

CPC分类号： G11C11/22

摘要： A method for reading and restoring data in a FERAM (10) is provided. The FERAM (10) comprises a FET (11) and a ferroelectric capacitor (12). The FET (11) has a gate connected to a word line (14), a source coupled to a plate line (15) via the ferroelectric capacitor (12), and a drain connected to a bit line (16). The reading process begins by placing a predetermined amount of charge in a bit line capacitor (17), which in turn charges the ferroelectric capacitor (12) after the FET (11) is switched on, resulting in a voltage drop determined by data stored in the FERAM (10) at the bit line (16). A sense amplifier (18) adjusts the voltage at the bit line (16) accordingly to read data from the FERAM (10). Applying a voltage at the plate line (15) and switching the FET (11) off restore the data to the FERAM (10).

公开(公告)号：EP0788241A3

公开(公告)日：1997-11-05

申请号：EP96117651.8

申请日：1996-11-04

申请人： MOTOROLA, INC.

发明人： Amon, Yossi ,  Baron, Natan

IPC分类号： H03M13/00

CPC分类号： G06F9/30032 ,  G06F9/30014 ,  G06F9/30101 ,  G06F9/30112 ,  H03M13/4107 ,  H03M13/4184 ,  H03M13/6569

摘要： A parallel data structure and a dedicated Viterbi shift left instruction minimize the number of clock cycles required for decoding a convolutionally encoded signal in a data processing system (20) in software. Specifically, the data structure and Viterbi shift left instruction reduce the number of clock cycles required for performing an add-compare-select butterfly operation. The add-compare-select butterfly operation is included in a DO loop in a plurality of instructions for executing a Viterbi decoding algorithm, and is repeated a predetermined number of times, for choosing the best path through a trellis diagram.

公开(公告)号：EP0746172A3

公开(公告)日：1997-09-03

申请号：EP96110155.7

申请日：1989-01-23

申请人： MOTOROLA, INC.

发明人： Felix, Kenneth A.

IPC分类号： H04Q7/22 ,  H04Q7/38

CPC分类号： H04W72/0446 ,  H04W36/06 ,  H04W36/08 ,  H04W36/24 ,  H04W74/04 ,  H04W84/042 ,  H04W92/02 ,  Y10S370/913

摘要： A method of handoff for use at base sites (110) of a cellular telephone system for handing off from one of the base sites to another one of the base sites at least one of a plurality of cellular telephones (102) each transceiving data packets and sharing a cellular radio channel of the cellular telephone system, which channel may be packet-switched or digital. A handoff message is sent to one of the active ones of the plurality of cellular telephones in response to determined system loading or signal characteristic, as exemplified in FIG. 7.

公开(公告)号：EP0789451A1

公开(公告)日：1997-08-13

申请号：EP97101439.4

申请日：1997-01-30

申请人： MOTOROLA SEMICONDUCTEURS S.A.

发明人： Brunel, Dominique ,  Trichet, Jacques

IPC分类号： H03F1/30 ,  H03F1/52

CPC分类号： H03F1/523 ,  H03F1/305

摘要： A monolithic RF amplifier circuit (10) suitable for use in the 0.8-2 GHz frequency range comprises, on-chip (12'), a gateable oscillator (24) running at about 2-5 times the amplifier input frequency or higher, coupled to a rectifier (30) and a low pass filter (34) for producing a DC signal which is fed via a bias/gain control circuit (46) to a bias / gain inputs (56, 58) of one or more amplification stages (60, 62) (e.g. GaAs FET) to provide bias therefore to ensure safe operation, and a priority control circuit (42) responsive to the bias. The priority control circuit (42) operates a power switch (18) that couples the amplification stages (60, 62) to a power supply, only when bias is present on their bias/gain inputs (56, 58) This protects the amplification stages (60, 62) against overcurrent operation. A separate external port (68) to the bias / gain control circuit (46) adjusts the magnitude of the bias to permit amplifier gain and power output to be adjusted. By gating the oscillator ON and OFF, high speed burst mode operation of the amplifier is achieved.

摘要翻译： 适用于0.8-2GHz频率范围的单片RF放大器电路（10）包括片上（12'），以大约2-5倍放大器输入频率或更高频率运行的可选择振荡器（24），耦合 用于产生经由偏置/增益控制电路（46）馈送到一个或多个放大级的偏置/增益输入（56,58）的DC信号的整流器（30）和低通滤波器（34） （例如GaAs FET），以提供偏置以确保安全操作，以及响应偏压的优先控制电路（42）。 优先级控制电路（42）只有在偏置/偏置存在于它们的偏置/增益输入（56,58）上时才将功率开关18连接到电源上。这保护了放大级 （60,62）防过电流操作。 与偏置/增益控制电路（46）的单独的外部端口（68）调整偏置的大小以允许调整放大器增益和功率输出。 通过选通振荡器的ON和OFF，实现了放大器的高速脉冲串模式操作。

公开(公告)号：EP0681272A3

公开(公告)日：1997-07-09

申请号：EP95106321.3

申请日：1995-04-27

申请人： MOTOROLA, INC.

发明人： Hollenbeck, Neal W. ,  Kang, David D.

IPC分类号： G07C5/04

CPC分类号： G07C5/04 ,  G01R31/007 ,  G07C3/04

摘要： An apparatus and method for determining a time that a system's main power was inactive includes a counter circuit (171) for accumulating transitions of a clock signal (149) while the system's main power (117) is inactive. Preferably, another circuit (159, 125) determines a periodicity of the clock signal (149) after the system's main power (117) transitions active. Then a computational circuit, preferably a microcontroller (129), determines the time (183) that the system's main power (117) was inactive dependent on a number of transitions of the clock signal (149) accumulated by the counter circuit (171) when the system's main power (119) was inactive and the determined periodicity of the clock signal (149) after the system's main power (117) transitions active. Preferably, this apparatus and method are used in a vehicle to determine how long a time that an engine is turned off and to modify an engine control strategy dependent on that determined time.

公开(公告)号：EP0717348A3

公开(公告)日：1997-06-04

申请号：EP95119622.9

申请日：1995-12-13

申请人： MOTOROLA, INC.

发明人： Smolansky, Leonid ,  Kowal, Shai ,  Goren, Avner ,  Galanti, David

IPC分类号： G06F5/06

CPC分类号： H04L49/9057 ,  G06F5/06 ,  G06F9/3879 ,  H04L29/06 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9052

摘要： A method and apparatus are provided for inserting an address at the beginning of a data stream that is being transferred through a FIFO buffer (65). The address is inserted at the beginning of the data stream to prevent the address from being lost. An address decoder (102) is used to identify a range of addresses that can access the FIFO buffer (65). The address may also contain header information for determining the destination of the data stream in a data processing system (20), and also contain information for controlling how the data stream is to be processed in the data processing system (20).