摘要:
There is provided a Cu bonding wire having a Pd coating layer on a surface thereof, that improves bonding reliability of a ball bonded part in a high-temperature and high-humidity environment and is suitable for on-vehicle devices. The bonding wire for a semiconductor device includes a Cu alloy core material and a Pd coating layer formed on a surface of the Cu alloy core material, and the bonding wire contains In of 0.011 to 1.2% by mass and has the Pd coating layer of a thickness of 0.015 to 0.150 µm. With this configuration, it is able to increase the bonding longevity of a ball bonded part in a high-temperature and high-humidity environment, and thus to improve the bonding reliability. When the Cu alloy core material contains one or more elements of Pt, Pd, Rh and Ni in an amount, for each element, of 0.05 to 1.2% by mass, it is able to increase the reliability of a ball bonded part in a high-temperature environment of 175°C or more. When an Au skin layer is further formed on a surface of the Pd coating layer, wedge bondability improves.
摘要:
The invention is related to a bonding wire, comprising a core with a surface, wherein the core comprises a core main component selected from the group consisting of copper and silver; and a coating layer which is at least partially superimposed over the surface of the core, wherein the coating layer comprises a coating component selected from the group palladium, platinum, gold, rhodium, ruthenium, osmium and iridium as a component in an amount of at least 10%; characterized in that the coating layer comprises the main component of the core as a component in an amount of at least 10%.
摘要:
To provide a power semiconductor module that can efficiently cool a high-heat-generating portion of a transistor device and has excellent connection reliability of a wiring bonding portion. A power semiconductor module includes: a heat sink (1); a circuit board connected to the heat sink (1) via a bondingmaterial and formed with a wiring on a front surface of an insulating substrate (2); a transistor device (5) including a main electrode (6) and a control electrode (7) formed on one surface and a back surface electrode formed on the other surface, the back surface electrode being connected to the circuit board via a bonding material; a first conductive member (10) bonded to the main electrode (6) via a bonding material; and wire or ribbon-shaped connection terminals (11) and (12) that electrically connect the first conductive member (10) and the control electrode (7) with another device or the circuit board, wherein the control electrode (7) is disposed at a corner portion of the main electrode (6), and the first conductive member (10) has a shape in which the first conductive member is cut out at a portion above the control electrode (7).
摘要:
A method for forming a semiconductor structure includes forming a bond pad (112) over a last metal layer (104, 106, 108) of the semiconductor structure. The bond pad is connected to a portion of the last metal layer, and the bond pad includes a wire bond region. The wire bond region (202, 504, 902, 1102) is recessed such that the wire bond region has a first thickness and a region of the bond pad outside the wire bond region has a second thickness that is greater than the first thickness.
摘要:
A power semiconductor device, operable regardless of thermal stress generation, which reduces heat generation from a wire, and secures the reliability of a bonding portion when the device is used for dealing with a large amount of current and/or under a high temperature atmosphere, a method of manufacturing the device and a bonding wire. The power semiconductor device comprises a metal electrode on a power semiconductor die and another metal electrode connected by a metal wire using a wedge bonding connection, wherein the metal wire is Ag or a Ag alloy wire having a diameter greater than 50µm and not greater than 2mm, and the metal electrode has thereon one or more metals and/or alloy layers, each of the layers being 50Å or more in thickness, wherein the metal for the layer is selected from Ni, Cr, Cu, Pd, V, Ti, Pt, Zn, Ag, Au, W and Al.
摘要:
A semiconductor device according to the present invention includes a semiconductor chip, an electrode pad made of a metal material containing aluminum and formed on a top surface of the semiconductor chip, an electrode lead disposed at a periphery of the semiconductor chip, a bonding wire having a linearly-extending main body portion and having a pad bond portion and a lead bond portion formed at respective ends of the main body portion and respectively bonded to the electrode pad and the electrode lead, and a resin package sealing the semiconductor chip, the electrode lead, and the bonding wire, the bonding wire is made of copper, and the entire electrode pad and the entire pad bond portion are integrally covered by a water-impermeable film.
摘要:
There is provided a bonding wire for semiconductor, capable of ensuring a favorable wedge bondability even when bonded to a palladium-plated lead frame, superior in oxidation resistivity and having a core wire of copper or a copper alloy. This bonding wire comprises: a core wire of copper or a copper alloy; a coating layer containing palladium and having a thickness of 10 to 200nm; and an alloy layer formed on a surface of the coating layer, such alloy layer containing a noble metal and palladium and having a thickness of 1 to 80nm. The aforementioned noble metal is either silver or metal, and a concentration of such noble metal in the alloy layer is not less than 10% and not more than 75% by volume.
摘要:
A semiconductor device (200) configured to provide current and voltage isolation inside an integrated circuit package, the semiconductor device comprising: a lead frame (210) including a first set of leads (220,222,224,226) and a second set of leads (230,232,234,236), the first set of leads being isolated from the second set of leads; a semiconductor die (240) positioned on the lead frame (210); an isolating block (250) positioned on the semiconductor die; a first interconnect coil (202) formed by a first set of wires (260,262,264,266), the semiconductor die, and the first set of leads; and a second interconnect coil (204) isolated from the first interconnect coil and formed by a second set of wires (280,282,284,286), the isolating block, and the second set of leads.