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1.发明公开Sputtering apparatus and method for producing thin films of material 失效Sputteranlage und -verfahren zur ErzeugungdünnerWerkstoffschichten。
公开(公告)号：EP0474348A2
公开(公告)日：1992-03-11
申请号：EP91306547.0
申请日：1991-07-18
CPC分类号： C23C14/225 , C23C14/34 , H01J37/34 , H01J37/3447
摘要： A sputtering apparatus for coating a substrate comprising a first electrode for supporting a target material and a second electrode for supporting a substrate, upon which the coating is deposited. A source of RF power is connected to impose an RF voltage across the electrodes to produce a glow discharge in the space between the electrodes, and shutter means is provided in the space between the electrodes. The shutter means has means for blocking a substantial part of the sputtered atoms from the target electrode glow discharge traveling at or near normal incidence and at least one opening shaped to permit a substantial part of the sputtered atoms from the target electrode traveling at an oblique angle to impinge upon the substrate to produce a thin film coating of the target material.
摘要翻译： 一种用于涂覆基材的溅射装置，包括用于支撑目标材料的第一电极和用于支撑基材的第二电极，在其上沉积涂层。 连接RF电源以在电极之间施加RF电压以在电极之间的空间中产生辉光放电，并且在电极之间的空间中设置快门装置。 快门装置具有用于阻挡来自目标电极辉光放电的大部分溅射原子的装置，其在正常入射处或其附近行进，并且至少一个开口成形为允许来自目标电极的大部分溅射原子以倾斜角行进 以撞击基板以产生目标材料的薄膜涂层。
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2.发明授权Method of forming a wide deep dielectric filled isolation trench in the surface of a silicon semiconductor substrate 失效在硅半导体基板的表面形成宽深度电介质填充隔离层的方法
公开(公告)号：EP0084635B1
公开(公告)日：1989-09-27
申请号：EP82111305.7
申请日：1982-12-07
IPC分类号： H01L21/76
CPC分类号： H01L21/76229 , H01L21/31055 , H01L21/31116
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3.发明授权A self-aligned process for providing an improved high performance bipolar transistor 失效用于提供改进的高性能双极晶体管的自对准方法
公开(公告)号：EP0036082B1
公开(公告)日：1984-12-12
申请号：EP81101068.5
申请日：1981-02-16
发明人： Horng, Cheng Tzong
IPC分类号： H01L21/00 , H01L21/285 , H01L21/60 , H01L21/76 , H01L29/72
CPC分类号： H01L21/76897 , H01L21/033 , H01L21/76229 , H01L21/76232 , H01L29/66272 , H01L29/7325 , Y10S148/131
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4.发明公开A polysilicon-base self-aligned bipolar transistor process 失效Ein selbstjustierendes Verfahrenfüreinen Bipolartransistor auf Polysilicium-Basis。
公开(公告)号：EP0036499A1
公开(公告)日：1981-09-30
申请号：EP81101364.8
申请日：1981-02-25
IPC分类号： H01L21/00 , H01L21/285 , H01L21/60 , H01L21/76 , H01L29/72
CPC分类号： H01L29/7325 , H01L21/0337 , H01L29/66272
摘要： Disclosed is a process for forming an improved bipolar transistor in a silicon substrate (10) of a first conductivity type (N), said silicon substrate (10) having a planar surface, a subcollector region (11) of a second conductivity type formed in said substrate, an epitaxial layer (12) of said second conductivity type formed on said planar surface of said substrate (10), and first, second and third spaced apart recessed oxide isolation regions extending from the planar surface of said epitaxial layer into said substrate (10), a subcollector reach-through region (25) positioned between said second and third recessed oxide isolation regions, said subcollector reach-through region (25) extending from said planar surface of said epitaxial layer to said subcollector region, said process including the following steps: deposit, using chemical vapor deposition techniques, a layer of doped polysilicon on the exposed surface of said substrate (10) said dopant being of said first conductivity type; deposit, using chemical vapor deposition techniques a first layer of silicon dioxide (27) on said polysilicon layer (26): deposit a layer of photoresist on said first layer of silicon dioxide; utilizing photolithography, mask off an intended intrinsic base region (32), said intended intrinsic base region (32) being spaced between said first and second recessed oxide isolation regions (37); utilizing the resist layer as a mask (23) employ reactive ion etching to remove the silicon dioxide and polysilicon superimposed over the intended intrinsic base region (32); ion implant the exposed intrinsic base region with ions of said first conductivity type; chemically vapor deposit a relatively thick silicon dioxide conformal coating on the exposed surface; reactive ion etch an emitter opening on the epitaxial surface above the implanted intrinsic base (32); ion implant the emitter region with ions of said second conductivity type; and utilize a single heat cycle to anneal the ion implantations and drive in the emitter, intrinsic base, extrinsic base and collector reach through.
摘要翻译： 公开了一种在第一导电类型（N）的硅衬底（10）中形成改进的双极晶体管的工艺，所述硅衬底（10）具有平坦表面，第二导电类型的子集电极区域（11）形成在 所述衬底，形成在所述衬底（10）的所述平坦表面上的所述第二导电类型的外延层（12）以及从所述外延层的平面表面延伸到所述衬底中的第一，第二和第三间隔开的凹陷氧化物隔离区 （10），位于所述第二和第三凹陷氧化物隔离区域之间的子集电极通过区域（25），从所述外延层的所述平面表面延伸到所述子集电极区域的所述子集电极通过区域（25），所述工艺包括 以下步骤 使用化学气相沉积技术沉积在所述衬底（10）的暴露表面上的掺杂多晶硅层，所述掺杂剂具有所述第一导电类型; 使用化学气相沉积技术沉积在所述多晶硅层（26）上的第一层二氧化硅（27）; 在所述第一层二氧化硅上沉积一层光致抗蚀剂; 利用光刻法掩盖预期的本征基极区域（32），所述预期本征基极区域（32）在所述第一和第二凹陷氧化物隔离区域（37）之间间隔开; 利用抗蚀剂层作为掩模（23）采用反应离子蚀刻去除叠加在预期的本征基区（32）上的二氧化硅和多晶硅; 离子用所述第一导电类型的离子注入暴露的本征碱基区域; 在暴露的表面上化学气相沉积相对较厚的二氧化硅保形涂层; 反应离子蚀刻在植入的本征基底（32）上方的外延表面上的发射体开口; 离子注入具有所述第二导电类型的离子的发射极区域; 并利用单个热循环来退火离子注入和驱动在发射极，本征基极，外在基极和集电极通过。
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公开(公告)号：EP0035111A2
公开(公告)日：1981-09-09
申请号：EP81100493.6
申请日：1981-01-23
发明人： Cavaliere, Joseph Richard , Horng, Cheng Tzong , Konian, Richard Robert , Rupprecht, Hans Stephan , Schwenker, Robert Otto
CPC分类号： H01L29/66272 , H01L21/033 , H01L21/28525 , H01L21/76229 , H01L21/76232 , H01L29/7325 , Y10S148/131
摘要： An improved bipolar transistor structure formed in a very small area of a thin epitaxial layer (12) on a planar surface of a silicon substrate (10) of first conductivity type, said very small area of the thin epitaxial layer (12) having vertical isolating sidewalls (22) extending to the planar surface of said substrate, said area of thin epitaxial layer (12) containing in the order recited a shallow depth emitter region (43) of a second conductivity type having an exposed planar surface, a shallow depth base region (47) of said first conductivity type, and a shallow depth active collector region of said second conductivity type, an elongated region (37) of said first conductivity type surrounding said emitter (43), base (47) and active collector regions, said elongated region (37) being contained within and coextensive with said vertical isolating sidewalls (22) of said small area of said thin epitaxial layer (12), whereby the base collector capacitance is materially reduced due to the very small area of the base-collector junction.
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公开(公告)号：EP0002661A1
公开(公告)日：1979-07-11
申请号：EP78101265.3
申请日：1978-10-31
IPC分类号： H01L21/82 , H01L21/265
CPC分类号： H01L29/66272 , H01L21/033 , H01L21/26513 , H01L21/2652
摘要： Bei einem Verfahren zum Herstellen von bipolaren Transistoren durch Ionenimplantation wird insbesondere die Basiszone (32) in eine auf ein Halbleitersubstrat (10) mit Subkollektor (14) epitaktisch aufgewachsene, die Kollektorzone bildende Halbleiterschicht (18) durch eine endgültig auf der Halbleiterschicht verbleibende, eine gleichmäßige Dicke aufweisende Siliciumdioxidschicht (20) hindurch implantiert. Anschließend werden Fenster (37, 36, 35) für den Emitterkontakt, den Basiskontakt und den Kollektorkontakt in der Siliciumdioxidschicht (20) geöffnet. Die Emitterzone (42) wird dann selektiv durch das Fenster (37) für den Emitterkontakt implantiert. Abschließend wird die die Kontakte und Verbindungsleitungen bildende Metallisierung auf die Siliciumdioxidschicht (20) aufgebracht.
Dieses Verfahren gewährleistet trotz direkter Implantation der Emitterzone eine gleichmäßige Dicke der die abschließende Metallisierung tragenden Isolierschicht, was zu gleichmäßigen und abschätzbaren Kapazitäten führt.摘要翻译： 在用于制造双极晶体管的通过离子注入，特别是在基极区域（32）与辅助集电极（14）在外延生长的半导体衬底（10）上的方法，所述集电区形成由所述半导体层上永久剩余，均匀的半导体层（18） 通过植入到厚的含氧化硅层（20）。 随后，窗口（37，36，35），用于发射极接触，基极接触，然后打开在该二氧化硅层（20）的集电极接触。 发射极区域（42）然后，选择性地通过所述窗口（37），用于发射极接触植入。 最后，接触和形成金属化连接线被施加到二氧化硅层（20）。 这种方法可以确保尽管在发射极区的直接植入具有最终金属化承载绝缘层的厚度均匀，导致均匀的和可评估的能力。
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7.发明公开A process for making a shielded magnetoresistive sensor 失效Herstellungsverfahren eines abgeschirmten磁阻传感器。
公开(公告)号：EP0361657A2
公开(公告)日：1990-04-04
申请号：EP89307913.7
申请日：1989-08-03
IPC分类号： G11B5/39
CPC分类号： G11B5/3903 , Y10T29/49034 , Y10T29/49044
摘要： A shielded magnetoresistive (MR) sensor in which the first shield (12) is of sendust or super sendust and the second shield is of permalloy is made by the steps of depositing a layer of sendust or super sendust to form a first shield; heat treating the sendust layer at a temperature greater than 400°C; depositing a first electrically insulating layer (18) ; depositing, in the presence of a magnetic field, a MR layer (20) ; depositing a second layer (26) of electrically insulating material; and, depositing a layer (28) of permalloy to form the second shield.
摘要翻译： 一种屏蔽磁阻（MR）传感器，其中第一屏蔽层（12）是铁硅铝型或超级铁硅铝型，第二屏蔽是坡莫合金，是通过沉积一层铁硅铝铁或超级铁硅铝铁层以形成第一屏蔽的步骤制成的; 在大于400℃的温度下对硅酸盐层进行热处理; 沉积第一电绝缘层（18）; 在磁场的存在下沉积MR层（20）; 沉积电绝缘材料的第二层（26）; 并且沉积坡莫合金的层（28）以形成第二屏蔽。
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8.发明公开Method of forming a wide deep dielectric filled isolation trench in the surface of a silicon semiconductor substrate 失效在硅半导体基板的表面形成宽深度电介质填充隔离层的方法
公开(公告)号：EP0084635A3
公开(公告)日：1986-08-27
申请号：EP82111305
申请日：1982-12-07
IPC分类号： H01L21/76
CPC分类号： H01L21/76229 , H01L21/31055 , H01L21/31116
摘要： A method of forming a wide deep dielectric filled isolation trench in the surface of a silicon semiconductor substrate by forming a wide plug of chemical vapor deposited silicon dioxide in the trench, filling the remaining unfilled trench portions by chemical vapor depositing a layer of silicon dioxide over the substrate and etching back this layer. The method produces chemically pure, planar wide deep dielectric filled isolation trenches and may also be used to simultaneously produce narrow deep dielectric filled isolation trenches.
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9.发明授权Verfahren zur Herstellung von breiten, tief eingeschnittenen Isolationsgräben in einem Halbleitersubstrat 失效用于在半导体基板中生产宽带和深度分离隔离开关的方法
公开(公告)号：EP0021147B1
公开(公告)日：1986-01-29
申请号：EP80103086.7
申请日：1980-06-03
IPC分类号： H01L21/76 , H01L21/90 , H01L21/263 , H01L21/316 , H01L23/52
CPC分类号： H01L21/0337 , H01L21/2633 , H01L21/3065 , H01L21/76208 , H01L21/76229 , H01L21/768 , H01L21/76877 , Y10S148/05 , Y10S148/051 , Y10S148/085 , Y10S148/106 , Y10S148/111 , Y10S148/131
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10.发明公开Method of forming a wide deep dielectric filled isolation trench in the surface of a silicon semiconductor substrate 失效一种制备宽而深的坑在由硅制成的半导体衬底的表面填充有电介质的方法。
公开(公告)号：EP0084635A2
公开(公告)日：1983-08-03
申请号：EP82111305.7
申请日：1982-12-07
IPC分类号： H01L21/76
CPC分类号： H01L21/76229 , H01L21/31055 , H01L21/31116
摘要： A method of forming a wide deep dielectric filled isolation trench in the surface of a silicon semiconductor substrate by forming a wide plug of chemical vapor deposited silicon dioxide in the trench, filling the remaining unfilled trench portions by chemical vapor depositing a layer of silicon dioxide over the substrate and etching back this layer. The method produces chemically pure, planar wide deep dielectric filled isolation trenches and may also be used to simultaneously produce narrow deep dielectric filled isolation trenches.
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