公开(公告)号：EP3217427A1

公开(公告)日：2017-09-13

申请号：EP16199543.6

申请日：2016-11-18

申请人： MediaTek Inc.

发明人： JI, Yan-Liang ,  HSIUNG, Ming-Jen

IPC分类号： H01L23/485

CPC分类号： H01L23/3171 ,  H01L23/3192 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/17 ,  H01L24/94 ,  H01L2224/0235 ,  H01L2224/02351 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05078 ,  H01L2224/05082 ,  H01L2224/05088 ,  H01L2224/05095 ,  H01L2224/05096 ,  H01L2224/05552 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/131 ,  H01L2224/94

摘要： A wafer-level chip-size package includes a semiconductor structure. A bonding pad is formed over the semiconductor structure, including a plurality of conductive segments. A conductive component is formed over the semiconductor structure, being adjacent to the bonding pad. A passivation layer is formed, exposing a portions of the conductive segments of the first bonding pad. A conductive redistribution layer is formed over the portions of the conductive segments of the first bonding pad exposed by the passivation layer. A planarization layer is formed over the passivation layer and the conductive redistribution layer, exposing a portion of the conductive redistribution layer. A UBM layer is formed over the planarization layer and the portion of the conductive redistribution layer exposed by the planarization layer. A conductive bump is formed over the UBM layer.

摘要翻译： 晶圆级芯片尺寸封装包括半导体结构。 焊盘形成在半导体结构上方，包括多个导电段。 导电组件形成在半导体结构上方，与键合焊盘相邻。 形成钝化层，暴露第一键合焊盘的部分导电段。 导电再分布层形成在由钝化层暴露的第一键合焊盘的导电段的部分上方。 平坦化层形成在钝化层和导电再分布层上，暴露导电再分布层的一部分。 UBM层形成在平坦化层和由平坦化层暴露的部分导电再分布层上。 在UBM层上形成导电凸块。

公开(公告)号：EP2953159A4

公开(公告)日：2016-11-09

申请号：EP14746692

申请日：2014-01-09

申请人： SII SEMICONDUCTOR CORP

发明人： YAMAMOTO SUKEHIRO

IPC分类号： H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L23/522

CPC分类号： H01L24/05 ,  H01L23/5226 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05017 ,  H01L2224/05085 ,  H01L2224/05088 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05553 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/45144 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85206 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

公开(公告)号：EP2669936B1

公开(公告)日：2018-02-14

申请号：EP12170528.9

申请日：2012-06-01

申请人： Nexperia B.V.

发明人： Boettcher, Tim ,  Walczyk, Sven ,  Groenhuis, Roelf ,  Brenner, Rolf ,  De Bruin, Emiel

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L23/485 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L21/78

CPC分类号： H01L21/78 ,  H01L21/56 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04105 ,  H01L2224/05016 ,  H01L2224/05088 ,  H01L2224/051 ,  H01L2224/05111 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/06181 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/20 ,  H01L2224/291 ,  H01L2224/32105 ,  H01L2224/32113 ,  H01L2224/32237 ,  H01L2224/33181 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2225/06513 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/12036 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2224/81 ,  H01L2224/05552

摘要： Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140, 610) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap (150) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.

公开(公告)号：EP2953159A1

公开(公告)日：2015-12-09

申请号：EP14746692.4

申请日：2014-01-09

申请人： Seiko I Infotech Inc.

发明人： YAMAMOTO, Sukehiro

IPC分类号： H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L23/522

CPC分类号： H01L24/05 ,  H01L23/5226 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05017 ,  H01L2224/05085 ,  H01L2224/05088 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05553 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/45144 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85206 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

摘要： In orderto prevent a crack from developing in an interlayer insulating film formed under a bonding pad due to impact, the bonding pad is formed so that small diameter metal plugs (14a) and large diameter metal plugs (14b) are arranged between a first metal film (12) and a second metal film (15) as an uppermost layer, and recessed portions (17) are formed in a surface of the second metal film (15) above the large diameter metal plugs 14b.

摘要翻译： 为了防止由于冲击而在焊盘下方形成的层间绝缘膜中出现裂纹，焊盘被形成为使得小直径金属塞（14a）和大直径金属塞（14b）被布置在第一金属膜 （12）和作为最上层的第二金属膜（15），并且在大直径金属插塞14b上方的第二金属膜（15）的表面中形成凹部（17）。

公开(公告)号：EP2669936A1

公开(公告)日：2013-12-04

申请号：EP12170528.9

申请日：2012-06-01

申请人： NXP B.V.

发明人： Boettcher, Tim ,  Walczyk, Sven ,  Groenhuis, Roelf ,  Brenner, Rolf ,  De Bruin, Emiel

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L23/485 ,  H01L25/065

CPC分类号： H01L21/78 ,  H01L21/56 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04105 ,  H01L2224/05016 ,  H01L2224/05088 ,  H01L2224/051 ,  H01L2224/05111 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/06181 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/20 ,  H01L2224/291 ,  H01L2224/32105 ,  H01L2224/32113 ,  H01L2224/32237 ,  H01L2224/33181 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2225/06513 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/12036 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2224/81 ,  H01L2224/05552

摘要： Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140, 610) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap (150) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.

摘要翻译： 公开了一种分立半导体器件封装（100），其包括半导体管芯（110），其具有第一表面和与所述第一表面相对的第二表面，所述第二表面承载触点（112）; 所述接触件上的导电体（120） 横向封装所述导电体的封装材料（130）; 以及与焊料部分导电接触的诸如焊料帽，另外的半导体管芯或其组合的封盖构件（140,610），所述焊料帽在封装材料上延伸。 可以在第一表面上设置另外的焊锡帽（150）。 还公开了制造这种分立半导体器件封装的方法。