公开(公告)号：EP2932806A1

公开(公告)日：2015-10-21

申请号：EP13811340.2

申请日：2013-12-09

Applicant: AT & S Austria Technologie & Systemtechnik Aktiengesellschaft

Inventor： TUOMINEN, Mikal ,  FISCHENEDER, Martin

IPC: H05K1/02

CPC classification number: H05K1/0253 ,  H01P3/08 ,  H05K1/0225 ,  H05K1/0245 ,  H05K2201/09272 ,  H05K2201/0969

Abstract: A printed circuit board that includes conductive layers separated by insulation layers of dielectric material, at least one conductive layer being patterned and having at least one signal line embedded in an insulation material, whereby a conductive ground plan layer, separated by the insulation material and lying in a predetermined distance (d) from the at least one signal line includes a ground plane area associated to and extending along the at least one signal line, the conductive layer associated to and extending along the at least one signal line is provided with openings therein. Preferably the openings are spaces between conducting stripes, extending, seen from above, across the at least one signal line, the conducting stripes being integrally connected with the conductive remainder of the conductive layer.

Abstract translation: 一种印刷电路板（9），包括由介电材料的绝缘层（14,16）分开的导电层（11,15,21），至少一个导电层（11,15）被图案化并且具有至少一个信号线（ 其中嵌入绝缘材料（10,14,16）中的由绝缘材料隔开并与所述至少一个信号线隔开预定距离（d）的导电接地平面层（15）包括 与所述至少一个信号线关联并且沿着所述至少一个信号线延伸的接地平面区域（17），与所述至少一个信号线（12,13）关联并且沿着所述至少一个信号线（12,13）延伸的所述导电层（15）在其中设置有开口（18）。 优选地，开口（18）是导电条（19）之间的空间，从上方看穿过至少一条信号线延伸，导电条与导电层（15）的导电剩余物（20）整体连接。

公开(公告)号：EP2453724A4

公开(公告)日：2014-11-05

申请号：EP10796870

申请日：2010-06-22

Applicant: FUJIKURA LTD

Inventor： YAMAMOTO SATOSHI ,  HASHIMOTO HIROKAZU

IPC: H05K1/11 ,  H01L23/15 ,  H05K1/02 ,  H05K3/00 ,  H05K3/40

CPC classification number: H05K3/101 ,  H01L23/15 ,  H01L23/473 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0272 ,  H05K3/4053 ,  H05K2201/09272 ,  H01L2924/00

公开(公告)号：EP2031944B1

公开(公告)日：2011-10-26

申请号：EP08704242.0

申请日：2008-01-31

Applicant: Nippon Mektron, Limited

Inventor： TOYOSHIMA, Ryoichi

IPC: H05K1/02

CPC classification number: H05K1/0224 ,  H05K1/0245 ,  H05K1/0253 ,  H05K1/0393 ,  H05K2201/09236 ,  H05K2201/09272

Abstract: A microstrip line is provided which keeps the shape of ground interconnections constant with respect to signal interconnections even if there is a curved geometry and can prevent a change in area of the ground interconnections opposite to the signal interconnections due to misregistration of exposed patterns or misalignment of stacked layers in a printed wiring board including a mediated thin insulation layer such as a flexible printed wiring board wherein a solid ground cannot be used. The printed wiring board having a microstrip line structure wherein the signal interconnections have a curved geometry is characterized in that it includes linear ground interconnections (5, 9, 12, 15, 19, 26) disposed opposite to the signal interconnections (4, 6, 8, 11, 14, 18, 25) via an insulation layer (3, 10, 13) and a wiring pitch of the ground interconnections is 1/n (here, n is a natural number of 1 or 2) of the line width of the signal interconnections.

Abstract translation: 提供了一种微带线，即使存在弯曲的几何形状，也可以保持接地互连的形状相对于信号互连恒定，并且可以防止由于暴露的图案的对准不准或者由于曝光图案的未对准而导致与信号互连相对的接地互连的面积的变化 在包括诸如柔性印刷线路板之类的中介薄绝缘层的印刷线路板中的堆叠层，其中不能使用坚实的地线。 具有微带线结构的印刷线路板，其中信号互连具有弯曲的几何形状，其特征在于，它包括与信号互连（4,6,8）相对设置的线性接地互连（5,9,12,15,19,26） （3,10,13），并且接地互连的配线间距为1 / n（这里，n是1或2的自然数）线宽度 的信号互连。

公开(公告)号：EP1376747A3

公开(公告)日：2005-07-20

申请号：EP03101915.1

申请日：2003-06-26

Applicant: Texas Instruments Incorporated

Inventor： Howard, Gregory ,  Swanson, Leland S.

IPC: H01P3/08 ,  H05K1/02

CPC classification number: H01P3/081 ,  H01L2224/48472 ,  H01L2224/49175 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H05K1/0245 ,  H05K1/0253 ,  H05K2201/09272 ,  H01L2924/00

Abstract: In high-speed semiconductor packaging, differential pair transmission lines 605 are used to receive incoming signals carried using differential signaling. Common mode noise can decrease the frequency at which these signals are clocked. The use of slots 620 formed in the ground (or power plane) 609 of the substrate and lying perpendicularly (and equally spaced) underneath the differential pair 605 improves the common mode rejection of the differential pair 605 by increasing the common mode impedance without affecting the differential mode impedance. The use of slots 620 does not require modifications to the packaging, and only minor modifications to the substrate.

Abstract translation: 在高速半导体封装中，使用差分对传输线605来接收使用差分信号传送的输入信号。 共模噪声可以降低这些信号频率的频率。 使用形成在基板的接地（或电源平面）609中并且位于差分对605之下的垂直（并且等间隔）的槽620，通过增加共模阻抗来改善差分对605的共模抑制，而不会影响 差分模式阻抗。 槽620的使用不需要对包装进行修改，并且仅对基材进行微小的修改。

公开(公告)号：EP1026794A2

公开(公告)日：2000-08-09

申请号：EP00102581.6

申请日：2000-02-07

Applicant: Litton Systems, Inc.

Inventor： Witherspoon, Barry Kent ,  Vaught, Larry Dean

IPC: H01R43/10

CPC classification number: H05K3/4007 ,  H01R39/10 ,  H01R43/10 ,  H05K1/11 ,  H05K3/108 ,  H05K2201/09272 ,  H05K2201/09745 ,  H05K2203/0369 ,  Y10T29/49011 ,  Y10T29/49155 ,  Y10T29/49156

Abstract: Disclosed is a method of manufacturing a slip ring printed circuit board which includes forming a plurality of concentric spaced electrical contacts on one side of a non-conductive base and forming interconnecting electrical paths on an opposite side of the non-conductive base. The method of manufacturing a slip ring printed circuit board also includes electrically connecting the electrical contacts and the interconnecting electrical paths, depositing copper on the electrical contacts to form electrical rings and etching a groove into each of the electrical rings.

Abstract translation: 公开了一种制造滑环印刷电路板的方法，其包括在非导电基底的一侧上形成多个同心隔开的电触头，并在非导电基底的相对侧上形成互连电路径。 制造滑环印刷电路板的方法还包括电连接电触头和互连电路径，在电触头上沉积铜以形成电环并将凹槽蚀刻到每个电环中。

公开(公告)号：EP0830671A1

公开(公告)日：1998-03-25

申请号：EP96901930.0

申请日：1996-02-09

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： KLAASSEN, Klaas, Berend

IPC: G11B5 ,  G11B21 ,  H05K1

CPC classification number: G11B5/486 ,  H05K1/0216 ,  H05K1/0306 ,  H05K1/056 ,  H05K2201/09272 ,  H05K2201/0969 ,  H05K2201/09727

Abstract: An integrated transducer-electronics interconnection suspension (12) for a disk drive having a high data transfer rate generally above (15) Mbytes/sec between the transducer (9) and the read/write electronics. A suspension (12) supports a slider (10) to which a transducer (9) is mounted and maintains the slider (10) in close proximity to the disk surface. An integrated transducer-electronics interconnection suspension is a laminate structure having electrically conductive traces as part of the structure and connecting the transducer (9) with the read/write electronics. It can support high data transfer rates between the transducer (9) and the read/write electronics by providing means for avoiding sudden changes in the characteristic impedance of the traces to minimize signal reflection on them. The width of the traces are shaped accordingly to prevent abrupt changes in the trace impedance caused by trace bonding areas, apertures and other mechanical obstructions in the suspension. Changes in the traces' direction are gradual to avoid signal reflection. Also, a patterned electrically conductive back plane may be provided in the laminate to better control the trace characteristic impedance. Where a trace crosses above a back plane opening, lateral extensions from the trace's side edges are formed to compensate for the resulting impedance change. In addition, the traces and bonding areas are grouped by signal type, with sufficient spacing between the groups, to minimize cross-coupling of the signals.

公开(公告)号：EP0384644B1

公开(公告)日：1995-05-03

申请号：EP90301612.9

申请日：1990-02-15

Applicant: TATSUTA ELECTRIC WIRE & CABLE CO., LTD.

Inventor： Nakatani, Fumio ,  Wakita, Shinichi ,  Murakami, Hisatoshi ,  Terada, Tsunehiko ,  Morimoto, Shohei, Hishiyahigashi-Ryo, Tatsuta Elec

IPC: H05K1/02 ,  H05K1/16 ,  H05K9/00

CPC classification number: H05K1/0216 ,  H05K1/0218 ,  H05K1/095 ,  H05K1/117 ,  H05K1/162 ,  H05K3/3447 ,  H05K3/4644 ,  H05K3/4664 ,  H05K9/0039 ,  H05K2201/0715 ,  H05K2201/09236 ,  H05K2201/09272 ,  H05K2201/09672 ,  H05K2201/10689 ,  Y10S428/901

公开(公告)号：EP0191902B1

公开(公告)日：1988-12-21

申请号：EP85112837.1

申请日：1985-10-10

Applicant: ANT Nachrichtentechnik GmbH

Inventor： Schomers, Josef. Dipl.-Ing. ,  Erbele, Kurt ,  Bonk, Wernfried, Dipl.-Ing.

IPC: H05K7/14

CPC classification number: H05K1/0228 ,  H05K7/1439 ,  H05K7/1459 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09245 ,  H05K2201/09272 ,  H05K2201/09709

公开(公告)号：EP3231263A1

公开(公告)日：2017-10-18

申请号：EP15813189.6

申请日：2015-11-30

Applicant: Microsoft Technology Licensing, LLC

Inventor： FULLAM, Scott Francis ,  CODD, Patrick Timothy ,  MEHTA, Agustya Ruchir

IPC: H05K1/02

CPC classification number: H05K1/0253 ,  H05K1/0224 ,  H05K1/0243 ,  H05K2201/0391 ,  H05K2201/09272 ,  H05K2201/09681 ,  H05K2201/09727 ,  H05K2201/09736

Abstract: Embodiments are disclosed for a printed circuit board 700. An example printed circuit board includes a ground plane 702 comprising a pattern of an electrically conductive material. The example printed circuit board further includes a circuit trace 704 disposed adjacent to the ground plane, where one or more characteristics of one of more of the pattern of the electrically conductive material in the ground plane and the circuit trace vary based upon a directional change of the circuit trace. A curved region 706 of the circuit trace is formed by a conductive material different from a conductive material included in uncurved regions of the circuit trace.

Abstract translation: 公开了用于印刷电路板200的实施例。示例性印刷电路板包括具有导电材料图案的接地面202。 示例性印刷电路板进一步包括布置在接地平面附近的电路迹线204，其中接地平面和电路迹线中的导电材料的图案中的一个或多个的一个或多个特征基于 电路跟踪。

公开(公告)号：EP3026536A1

公开(公告)日：2016-06-01

申请号：EP15181253.4

申请日：2015-08-17

Applicant: LG Innotek Co., Ltd.

Inventor： HAN, Jung Hyuck ,  CHOE, Yu Lim ,  KOO, Chan Kyu ,  SHIN, Jun Sik ,  YANG, Joon Hyuk ,  LEE, Seung Jin ,  JEON, Yu Hong

IPC: G06F3/044

CPC classification number: G06F3/044 ,  G06F2203/04112 ,  H05K1/0296 ,  H05K3/28 ,  H05K2201/09245 ,  H05K2201/09272

Abstract: According to the embodiment, there is a provided a touch window which includes a substrate (100); and an electrode on the substrate (100), wherein the electrode includes a first mesh line (201) extending in a first direction and having a first width (W1); a second mesh line (202) extending in a direction different from the first direction and having a second width (W2); and a crossing area (CA) in which the first and second mesh lines (201 ; 202) cross each other, the crossing area (CA) having a third width (W3), wherein the third width (W3) is larger than the first width (W1), and the third width (W3) is equal to or less than 10 times of the first width (W1).

Abstract translation: 根据实施例，提供了一种触摸窗，其包括基板（100）; 以及在所述基板（100）上的电极，其中所述电极包括沿第一方向延伸并具有第一宽度（W1）的第一网眼线（201）。 第二网线（202），其在与所述第一方向不同的方向上延伸并具有第二宽度（W2）; 以及交叉区域（CA），其中所述第一和第二网线（201; 202）彼此交叉，所述交叉区域（CA）具有第三宽度（W3），其中所述第三宽度（W3）大于所述第一宽度 宽度（W1）和第三宽度（W3）等于或小于第一宽度（W1）的10倍。