摘要:
An improved CMOS pixel with a combination of analog and digital readouts to provide a large pixel dynamic range without compromising low-light performance using a comparator to test the value of an accumulated charge at a series of exponentially increasing exposure times. The test is used to stop the integration of photocurrent once the accumulated analog voltage has reached a predetermined threshold. A one-bit output value of the test is read out of the pixel (digitally) at each of the exponentially increasing exposure periods. At the end of the integration period, the analog value stored on the integration capacitor is read out using conventional CMOS active pixel readout circuits.
摘要:
A shield region of metallization is formed in a first metallization layer of an integrated circuit so as to increase the metal density of the first metallization layer to at least a minimum density required for proper fabrication. The shield region is coupled via an amplifier or other suitable coupling mechanism to at least a portion of another metallization layer overlying or underlying the first metallization layer in the integrated circuit, such that the shield region acts to reduce parasitic capacitance associated with a circuit node in the other metallization layer. In an illustrative fingerprint sensor cell implementation, the shield region is in the form of a shield plate underlying a sensor plate in the sensor cell and serves to increase the metal density of a lower-level metallization layer in the cell. The sensor plate is coupled to the shield plate via a unity-gain amplifier, so as to reduce the parasitic capacitance seen by the sensor plate, thereby improving the ability of the sensor cell to detect fingerprint characteristics. The invention can provide similar advantages in numerous other integrated circuit applications.
摘要:
The single-polysilicon active pixel comprises a photo site located on a substrate for generating and storing charge carriers, the charge carriers being generated from photonic energy incident upon the photo site and semiconductor substrate, a photo gate, a transfer transistor and output and reset electronics. The gate of the transfer transistor and the photo gate are defined in a single layer of polysilicon disposed on the semiconductor substrate. The source of transfer transistor is a doped region of substrate, referred to as a coupling diffusion, which provides the electrical coupling between the photo gate and the transfer transistor. The coupling diffusion allows for the transfer of a signal stored in a photo site under the photo gate to the output electronics for processing. The single-polysilicon active pixel may be operated by biasing the transfer transistor to the low operating voltage of the pixel, for example, 0 volts. By virtue of the structure of the single-polysilicon active pixel, this mode of operation results in the same timing as if the transfer transistor were clocked, but neither a clock nor the associated driving circuitry are required. However, there is little no tendency for image lag as occurs in double polysilicon active pixels when they are operated in a manner which avoids clocking the transfer gate.
摘要:
Methods and apparatus are provided for performing multiple correlated double sampling (CDS) operations on an imaging pixel, and in some cases on an array of imaging pixels, during a single integration cycle of the pixel(s). The multiple CDS operations may produce multiple CDS values, which may be processed in combination to produce a resulting value substantially free of various types of noise. The CDS operations may be performed using a CDS circuit including a single-ended charge amplifier having an input capacitor. The charge amplifier may also include a variable capacitance providing a variable gain. The variable capacitance may be provided by a feedback capacitor.
摘要:
Methods and apparatus are provided for performing multiple correlated double sampling (CDS) operations on an imaging pixel, and in some cases on an array of imaging pixels, during a single integration cycle of the pixel(s). The multiple CDS operations may produce multiple CDS values, which may be processed in combination to produce a resulting value substantially free of various types of noise. The CDS operations may be performed using a CDS circuit including a single-ended charge amplifier having an input capacitor. The charge amplifier may also include a variable capacitance providing a variable gain. The variable capacitance may be provided by a feedback capacitor.
摘要:
Imaging arrays comprising at least two different imaging pixel types are described. The different imaging pixel types may differ in their light sensitivities and/or light saturation levels. Methods of processing the output signals of the imaging arrays are also described, and may produce images having a greater dynamic range than would result from an imaging array comprising only one of the at least two different imaging pixel types.
摘要:
A circuit including: an optical detector for detecting an optical pulse and generating therefrom a current pulse on an output; a pulse detector circuit having an input electrically connected to the optical detector and having an output for outputting a detection pulse in response to detecting the current pulse on its input, said pulse detector circuit including: a resettable amplifier including an input for receiving the current pulse from the optical detector, a reset terminal for resetting the amplifier after the amplifier detects the current pulse on its input, and an output for outputting a signal from which the detection pulse is derived; and a reset delay chain feeding back to the reset terminal of the resettable amplifier a feedback signal derived from the output signal of the resettable amplifier.
摘要:
A memory sense amplifier for a static random access memory includes a pair of transistor amplifiers respective to the bit lines threading the memory. The power consumed is minimized without sacrificing speed of operation by temporarily connecting the source electrodes of the transistor amplifiers to the bit lines to allow them to track the states of the bit lines before a current path is completed to the drains of the transistors to allow them to draw current from the bit lines, thereby minimizing the time that the sense amplifiers are permitted to draw current from the bit lines. In addition, an economy of circuitry is achieved by eliminating the need for a separate latch circuit by disconnecting the sense amplifiers from the bit lines and thereafter enabling them to latch the information state read from the bit lines. The memory cycle is defined in four distinct phases ("PRECHARGE", "SENSE", "SELECT", and "HOLD"), instead of in two phases ("clock" and "select") followed by indeterminate length self-timed intervals as provided in prior art U.S. Pat. No. 5,309,395.
摘要:
Efficient decoding of an hierarchical, variable length, encoded data sequence containing embedded uncoded data into a sequence of fixed length instructions for subsequent processing by a digital video processor or the like is realized in an apparatus including a decoder having a plurality of variable length code decoding elements and a control structure embedded within each decoding element for transferring the decoding operation to an appropriate one of the decoding elements in response to a prior output from the decoder element. As the encoded data sequence is processed by the apparatus, a predetermined length of the sequence is stored in a register. The control structure further responds to the encoded data sequence to initiate selection of either the predetermined length of the sequence stored in the register or a portion of the decoder output as the fixed length instruction to be output by the apparatus.
摘要:
Optical imaging structures and methods are disclosed. One structure may be implemented as an imaging pixel having multiple photodetectors. The photodetectors may detect different wavelengths of incident radiation, and may be operated simultaneously or at separate times. An imager may include an imaging array of pixels of the type described. Methods of operating such structures are also described.