公开(公告)号：US5296411A

公开(公告)日：1994-03-22

申请号：US54324

申请日：1993-04-28

申请人： Mark I. Gardner ,  Henry J. Fulford, Jr.

发明人： Mark I. Gardner ,  Henry J. Fulford, Jr.

IPC分类号： H01L21/28 ,  H01L21/3105 ,  H01L21/3115 ,  H01L21/314 ,  H01L21/316 ,  H01L29/51 ,  H01L21/02

CPC分类号： H01L21/28185 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02337 ,  H01L21/3105 ,  H01L21/3115 ,  H01L21/3144 ,  H01L21/31662 ,  H01L29/518 ,  H01L21/28167 ,  H01L21/28202 ,  H01L21/28211

摘要： A high-quality tunnel oxide, suitable for EEPROM devices, is formed upon a surface region of a semiconductor body over a heavily-doped N+ layer by first oxidizing the semiconductor body to form an oxide upon the surface region of the semiconductor body over the heavily-doped N+ layer. Next, the semiconductor body is annealed, under a gettering ambient, to densify the oxide and to dope the oxide at its surface and for a portion thereinto near its surface with a gettering agent. The semiconductor body is then oxidized, under an oxidizing ambient, to thicken the oxide, after which it is annealed for a second time, this time under an oxidizing ambient containing nitrogen, to further thicken the oxide and to form a surface layer therein containing a concentration of nitrogen. Tunnel oxides thus fabricated exhibit dramatically improved time-to-breakdown characteristics compared to tunnel oxides processed without such a nitrogen anneal. Furthermore, gate oxides formed earlier in a process sequence, but receiving the same nitrogen anneal, also exhibit markedly improved time-to-breakdown characteristics, as well as substantially improved threshold stability in response to a fixed current passed through the gate oxide.

摘要翻译： 通过首先氧化半导体体以在半导体主体的表面区域上形成氧化物，在重掺杂的N +层上的半导体本体的表面区域上形成适用于EEPROM器件的高品质隧道氧化物， 掺杂的N +层。 接下来，在吸气环境下，将半导体本体退火以使氧化物致密化并在其表面上掺杂氧化物，并在其表面附近用吸杂剂掺杂一部分。 然后在氧化环境下氧化半导体体，使氧化物变厚，然后将其退火第二次，此时在含有氮的氧化环境下进一步增厚氧化物，并形成其中含有 氮浓度 与没有进行氮退火处理的隧道氧化物相比，如此制造的隧道氧化物显示出显着改善的时间到击穿特性。 此外，在工艺顺序中较早形成但接受相同氮退火的栅极氧化物也显示出显着改善的击穿时间特性，以及响应于通过栅极氧化物的固定电流而显着改善阈值稳定性。

公开(公告)号：US5350491A

公开(公告)日：1994-09-27

申请号：US947313

申请日：1992-09-18

申请人： Henry J. Fulford, Jr. ,  Mark I. Gardner

发明人： Henry J. Fulford, Jr. ,  Mark I. Gardner

IPC分类号： H01L21/306 ,  H01L21/311 ,  H01L21/762 ,  H01L21/00 ,  B44C1/22 ,  C03C15/00 ,  H01L21/02

CPC分类号： H01L21/31111 ,  H01L21/76202

摘要： A method is disclosed for removing oxide from the surface of a semiconductor body having a thick oxide and an adjoining thin oxide, without subjecting the surface to significant over-etching and thus avoiding degradation of the surface of the semiconductor body. A photoresist layer is first deposited covering the thin oxide. The thick oxide is then etched for a period of time so that a portion of the thick oxide remains, and has a thickness comparable to that of the thin oxide. The photoresist layer covering the thin oxide is next removed without appreciably etching either the remaining portion of the thick oxide or the thin oxide. Finally, the thin oxide and the remaining portion of the thick oxide are removed, without appreciably over-etching the surface of the semiconductor body.

摘要翻译： 公开了一种从具有厚氧化物和邻接的薄氧化物的半导体主体的表面去除氧化物的方法，而不会使表面受到显着的过度蚀刻，从而避免了半导体本体的表面的劣化。 首先沉积覆盖薄氧化物的光致抗蚀剂层。 然后将厚氧化物蚀刻一段时间，使得一部分厚氧化物保留，并具有与薄氧化物相当的厚度。 接着去除覆盖薄氧化物的光致抗蚀剂层，而不会明显地蚀刻厚氧化物或薄氧化物的剩余部分。 最后，去除薄氧化物和厚氧化物的剩余部分，而不会明显地过度蚀刻半导体本体的表面。

公开(公告)号：US5538923A

公开(公告)日：1996-07-23

申请号：US251070

申请日：1994-05-27

申请人： Mark I. Gardner ,  Henry J. Fulford, Jr.

发明人： Mark I. Gardner ,  Henry J. Fulford, Jr.

IPC分类号： H01L21/28 ,  H01L21/316 ,  H01L21/336 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792 ,  H01L21/02

CPC分类号： H01L21/28185 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02299 ,  H01L21/31662 ,  H01L29/518 ,  H01L29/66825 ,  H01L21/28167 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L27/115 ,  Y10S438/981

摘要： The quality of both a gate oxide and a tunnel oxide in a P-well of a CMOS EEPROM process is improved by growing and subsequently annealing in-situ a gate oxide. A photoresist layer is then applied and defined to expose regions of the gate oxide which are then etched to expose the surface of the semiconductor, and after which the photoresist layer is removed. Subsequently, the remaining gate oxide is partially etched to reduce the thickness of the gate oxide and to remove any native oxide which may have formed over the exposed semiconductor surface. Finally, a tunnel oxide is grown upon the exposed semiconductor surface. The quality of this tunnel oxide is dramatically improved due to the in-situ anneal of the gate oxide, even though the gate oxide (in the region of the tunnel oxide) is totally removed before tunnel oxide growth. Furthermore, the re-oxidized gate oxide which was not entirely removed before tunnel oxide growth also exhibits higher breakdown voltages.

摘要翻译： CMOS EEPROM工艺的P阱中的栅极氧化物和隧道氧化物的质量通过生长并随后原位退火栅极氧化物得到改善。 然后施加和定义光致抗蚀剂层以暴露栅极氧化物的区域，然后蚀刻该栅极氧化物以露出半导体的表面，之后除去光致抗蚀剂层。 随后，剩余的栅极氧化物被部分蚀刻以减小栅极氧化物的厚度并去除可能在暴露的半导体表面上形成的任何天然氧化物。 最后，在暴露的半导体表面上生长隧道氧化物。 即使栅极氧化物（在隧道氧化物的区域中）在隧道氧化物生长之前被完全去除，由于栅极氧化物的原位退火，隧道氧化物的质量显着提高。 此外，在隧道氧化物生长之前未完全除去的再氧化的栅极氧化物也表现出更高的击穿电压。

公开(公告)号：US08853833B2

公开(公告)日：2014-10-07

申请号：US13159203

申请日：2011-06-13

申请人： Vladimir Mikhalev ,  Michael Smith ,  Henry J. Fulford ,  Puneet Sharma ,  Zia A. Shafi

发明人： Vladimir Mikhalev ,  Michael Smith ,  Henry J. Fulford ,  Puneet Sharma ,  Zia A. Shafi

IPC分类号： H01L23/552 ,  H01L23/522

CPC分类号： H01L23/552 ,  H01L23/5225 ,  H01L23/5226 ,  H01L23/53271 ,  H01L27/088 ,  H01L29/402 ,  H01L29/404 ,  H01L29/45 ,  H01L29/7833 ,  H01L2924/0002 ,  H03K17/161 ,  H03K17/162 ,  H01L2924/00

摘要： Semiconductor devices are described, along with methods and systems that include them. One such device includes a diffusion region in a semiconductor material, a terminal coupled to the diffusion region, and a field plate coupled to the terminal and extending from the terminal over the diffusion region to shield the diffusion region. Additional embodiments are also described.

摘要翻译： 描述半导体器件以及包括它们的方法和系统。 一种这样的器件包括在半导体材料中的扩散区域，耦合到扩散区域的端子和耦合到端子并且从端子在扩散区域上延伸以屏蔽扩散区域的场板。 还描述了另外的实施例。

公开(公告)号：US20120313691A1

公开(公告)日：2012-12-13

申请号：US13159203

申请日：2011-06-13

申请人： Vladimir Mikhalev ,  Michael Smith ,  Henry J. Fulford ,  Puneet Sharma ,  Zia A. Shafi

发明人： Vladimir Mikhalev ,  Michael Smith ,  Henry J. Fulford ,  Puneet Sharma ,  Zia A. Shafi

IPC分类号： H03K3/01 ,  H01L27/04 ,  H01L23/552

CPC分类号： H01L23/552 ,  H01L23/5225 ,  H01L23/5226 ,  H01L23/53271 ,  H01L27/088 ,  H01L29/402 ,  H01L29/404 ,  H01L29/45 ,  H01L29/7833 ,  H01L2924/0002 ,  H03K17/161 ,  H03K17/162 ,  H01L2924/00

摘要： Semiconductor devices are described, along with methods and systems that include them. One such device includes a diffusion region in a semiconductor material, a terminal coupled to the diffusion region, and a field plate coupled to the terminal and extending from the terminal over the diffusion region to shield the diffusion region. Additional embodiments are also described.

摘要翻译： 描述半导体器件以及包括它们的方法和系统。 一种这样的器件包括在半导体材料中的扩散区域，耦合到扩散区域的端子和耦合到端子并且从端子在扩散区域上延伸以屏蔽扩散区域的场板。 还描述了另外的实施例。

公开(公告)号：US5362685A

公开(公告)日：1994-11-08

申请号：US969708

申请日：1992-10-29

申请人： Mark I. Gardner ,  Henry J. Fulford, Jr. ,  Jay J. Seaton

发明人： Mark I. Gardner ,  Henry J. Fulford, Jr. ,  Jay J. Seaton

IPC分类号： H01L21/28 ,  H01L21/316 ,  H01L21/762 ,  H01L21/8247 ,  H01L29/788 ,  H01L29/792 ,  H01L21/266

CPC分类号： H01L27/11517 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/28273 ,  H01L21/31662 ,  H01L21/76202 ,  Y10S438/981

摘要： The quality of both a gate oxide and a tunnel oxide in a P-well active area of a CMOS EEPROM process is improved by reducing the field edge pullback arising from wet chemical etch steps prior to the growth of the gate and tunnel oxides. A first oxide is grown, and an implant is performed through the first oxide to form an implanted layer. The surface of the first oxide is then cleaned without removing all of the first oxide overlying the implanted layer. An anneal step then activates the implanted layer to form a heavily-doped region, after which the remaining first oxide is then removed. A second oxide is then grown, and a region of the second oxide is removed overlying the heavily-doped region. Lastly, a tunnel oxide is grown over the heavily-doped region while re-oxidizing the second oxide to form a gate oxide thicker than the tunnel oxide.

摘要翻译： 在CMOS EEPROM工艺的P阱有源区域中的栅极氧化物和隧道氧化物的质量通过减少在栅极和隧道氧化物生长之前由湿化学蚀刻步骤引起的场边缘回退而得到改善。 生长第一氧化物，并且通过第一氧化物进行注入以形成注入层。 然后清洁第一氧化物的表面，而不去除覆盖在注入层上的所有第一氧化物。 退火步骤然后激活注入层以形成重掺杂区域，此后剩余的第一氧化物被除去。 然后生长第二氧化物，并且去除重掺杂区域上的第二氧化物的区域。 最后，在重掺杂区域上生长隧道氧化物，同时再次氧化第二氧化物以形成比隧道氧化物更厚的栅极氧化物。

公开(公告)号：US5350492A

公开(公告)日：1994-09-27

申请号：US947314

申请日：1992-09-18

申请人： Steven C. Hall ,  Mark I. Gardner ,  Henry J. Fulford, Jr.

发明人： Steven C. Hall ,  Mark I. Gardner ,  Henry J. Fulford, Jr.

IPC分类号： H01L21/306 ,  H01L21/311 ,  H01L21/762 ,  H01L21/00 ,  B44C1/22 ,  C03C15/00 ,  H01L21/02

CPC分类号： H01L21/76202 ,  H01L21/31111 ,  Y10S438/911

摘要： A method is disclosed for removing oxide from the surface of a semiconductor body having a thick oxide and an adjoining nitride-covered thin oxide, without subjecting the surface to significant over-etching and thus avoiding degredation of the surface of the semiconductor body. The thick oxide is first etched for a period of time so that a portion of the thick oxide remains, and has a thickness comparable to that of the thin oxide. The nitride covering the thin oxide is next removed without appreciably etching either the remaining portion of the thick oxide or the thin oxide. Finally, the thin oxide and the remaining portion of the thick oxide are removed, without appreciably over-etching the surface of the semiconductor body.

摘要翻译： 公开了一种用于从具有厚氧化物和邻接的氮化物覆盖的薄氧化物的半导体主体的表面去除氧化物的方法，而不会使表面受到显着的过度蚀刻，从而避免半导体本体的表面变色。 首先蚀刻厚氧化物一段时间，使得一部分厚氧化物保留，并具有与薄氧化物相当的厚度。 覆盖薄氧化物的氮化物接下来被去除，而不明显地蚀刻厚氧化物或薄氧化物的剩余部分。 最后，去除薄氧化物和厚氧化物的剩余部分，而不会明显地过度蚀刻半导体本体的表面。

公开(公告)号：US5316981A

公开(公告)日：1994-05-31

申请号：US959230

申请日：1992-10-09

申请人： Mark I. Gardner ,  Henry J. Fulford, Jr.

发明人： Mark I. Gardner ,  Henry J. Fulford, Jr.

IPC分类号： H01L21/28 ,  H01L21/316 ,  H01L21/336 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/51 ,  H01L29/788 ,  H01L29/792 ,  H01L21/02

CPC分类号： H01L21/28185 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02299 ,  H01L21/31662 ,  H01L29/518 ,  H01L29/66825 ,  H01L21/28167 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L27/115 ,  Y10S438/981

摘要： The quality of both a gate oxide and a tunnel oxide in a P-well of a CMOS EEPROM process is improved by growing and subsequently annealing in-situ a gate oxide. A photoresist layer is then applied and defined to expose regions of the gate oxide which are then etched to expose the surface of the semiconductor, and after which the photoresist layer is removed. Subsequently, the remaining gate oxide is partially etched to reduce the thickness of the gate oxide and to remove any native oxide which may have formed over the exposed semiconductor surface. Finally, a tunnel oxide is grown upon the exposed semiconductor surface. The quality of this tunnel oxide is dramatically improved due to the in-situ anneal of the gate oxide, even though the gate oxide (in the region of the tunnel oxide) is totally removed before tunnel oxide growth. Furthermore, the re-oxidized gate oxide which was not entirely removed before tunnel oxide growth also exhibits higher breakdown voltages.

摘要翻译： CMOS EEPROM工艺的P阱中的栅极氧化物和隧道氧化物的质量通过生长并随后原位退火栅极氧化物得到改善。 然后施加和定义光致抗蚀剂层以暴露栅极氧化物的区域，然后蚀刻该栅极氧化物以露出半导体的表面，之后除去光致抗蚀剂层。 随后，剩余的栅极氧化物被部分蚀刻以减小栅极氧化物的厚度并去除可能在暴露的半导体表面上形成的任何天然氧化物。 最后，在暴露的半导体表面上生长隧道氧化物。 即使栅极氧化物（在隧道氧化物的区域中）在隧道氧化物生长之前被完全去除，由于栅极氧化物的原位退火，隧道氧化物的质量显着提高。 此外，在隧道氧化物生长之前未完全除去的再氧化的栅极氧化物也表现出更高的击穿电压。