公开(公告)号：US09632108B2

公开(公告)日：2017-04-25

申请号：US14243640

申请日：2014-04-02

Applicant: CASCADE MICROTECH, INC.

Inventor： Michael Teich ,  Stojan Kanev ,  Hans-Jurgen Fleischer

IPC: G01R31/28 ,  G01R1/04

CPC classification number: G01R1/0408 ,  G01R31/2855 ,  G01R31/2874 ,  G01R31/2875 ,  G01R31/2886

Abstract: A method and an apparatus for verifying or testing test substrates, i.e. wafers and other electronic semiconductor components, in a prober under defined thermal conditions. Such a verifying apparatus, known to the person skilled in the art as a prober, has a housing having at least two housing sections, in one housing section of which, designated hereinafter as test chamber, the test substrate to be verified is held by a chuck and is set to a defined temperature, and in the other housing section of which, designated hereinafter as probe chamber, probes are held. For verification purposes, the test substrate and the probes are positioned relative to one another by means of at least one positioning device and the probes subsequently make contact with the test substrate.

公开(公告)号：US09373533B2

公开(公告)日：2016-06-21

申请号：US14141812

申请日：2013-12-27

Applicant: Cascade Microtech, Inc.

Inventor： Frank Fehrmann ,  Botho Hirschfeld ,  Stojan Kanev

IPC: G01R31/20 ,  H01L21/677

CPC classification number: H01L21/67745 ,  H01L21/67775

Abstract: Systems and methods for providing wafer access in a wafer processing system are disclosed herein. The methods may include docking a first wafer cassette on the wafer processing system and removing a selected wafer from the first wafer cassette with the wafer processing system. The methods further may include performing a process operation on the selected wafer with the wafer processing system and undocking the first wafer cassette from the wafer processing system while performing the process operation. The methods also may include docking a second wafer cassette (which may be the same as or different from the first wafer cassette) on the wafer processing system, inventorying the second wafer cassette with the wafer processing system, and/or subsequently placing the selected wafer in the second wafer cassette. The systems may include wafer processing systems that include a controller that is programmed to perform at least a portion of the methods.

Abstract translation: 本文公开了在晶片处理系统中提供晶片访问的系统和方法。 所述方法可以包括将晶片处理系统上的第一晶片盒对接，并且利用晶片处理系统从第一晶片盒移除选定的晶片。 该方法还可以包括使用晶片处理系统在所选择的晶片上执行处理操作，并且在执行处理操作时从晶片处理系统脱离第一晶片盒。 所述方法还可以包括将第二晶片盒（其可以与第一晶片盒相同或不同）对准在晶片处理系统上，利用晶片处理系统盘存第二晶片盒，和/或随后将所选择的晶片 在第二晶片盒中。 系统可以包括晶片处理系统，其包括被编程为执行方法的至少一部分的控制器。

公开(公告)号：US20140186145A1

公开(公告)日：2014-07-03

申请号：US14141812

申请日：2013-12-27

Applicant: Cascade Microtech, Inc.

Inventor： Frank Fehrmann ,  Botho Hirschfeld ,  Stojan Kanev

IPC: H01L21/67

CPC classification number: H01L21/67745 ,  H01L21/67775

Abstract: Systems and methods for providing wafer access in a wafer processing system are disclosed herein. The methods may include docking a first wafer cassette on the wafer processing system and removing a selected wafer from the first wafer cassette with the wafer processing system. The methods further may include performing a process operation on the selected wafer with the wafer processing system and undocking the first wafer cassette from the wafer processing system while performing the process operation. The methods also may include docking a second wafer cassette (which may be the same as or different from the first wafer cassette) on the wafer processing system, inventorying the second wafer cassette with the wafer processing system, and/or subsequently placing the selected wafer in the second wafer cassette. The systems may include wafer processing systems that include a controller that is programmed to perform at least a portion of the methods.

Abstract translation: 本文公开了在晶片处理系统中提供晶片访问的系统和方法。 所述方法可以包括将晶片处理系统上的第一晶片盒对接，并且利用晶片处理系统从第一晶片盒移除选定的晶片。 该方法还可以包括使用晶片处理系统在所选择的晶片上执行处理操作，并且在执行处理操作时从晶片处理系统脱离第一晶片盒。 所述方法还可以包括将第二晶片盒（其可以与第一晶片盒相同或不同）对准在晶片处理系统上，利用晶片处理系统盘存第二晶片盒，和/或随后将所选择的晶片 在第二晶片盒中。 系统可以包括晶片处理系统，其包括被编程为执行方法的至少一部分的控制器。

公开(公告)号：US09395411B2

公开(公告)日：2016-07-19

申请号：US13953545

申请日：2013-07-29

Applicant: Cascade Microtech, Inc.

Inventor： Joerg Kiesewetter ,  Stojan Kanev ,  Michael Teich ,  Karsten Stoll ,  Axel Schmidt

IPC: G01R31/00 ,  G01R31/28

CPC classification number: G01R31/2891 ,  G01R31/2874

Abstract: In a method and a device for testing a test substrate under defined thermal conditions, a substrate that is to be tested is held by a temperature-controllable chuck and is set to a defined temperature; the test substrate is positioned relative to test probes by at least one positioning device; and the test probes make contact with the test substrate for testing purposes. At least one component of the positioning device that is present in the vicinity of the temperature-controlled test substrate is set to a temperature that is independent of the temperature of the test substrate by a temperature-controlling device, and this temperature is held constant.

公开(公告)号：US20140239991A1

公开(公告)日：2014-08-28

申请号：US14243640

申请日：2014-04-02

Applicant: CASCADE MICROTECH, INC.

Inventor： Michael Teich ,  Stojan Kanev ,  Hans-Jurgen Fleischer

IPC: G01R1/04

CPC classification number: G01R1/0408 ,  G01R31/2855 ,  G01R31/2874 ,  G01R31/2875 ,  G01R31/2886

Abstract: A method and an apparatus for verifying or testing test substrates, i.e. wafers and other electronic semiconductor components, in a prober under defined thermal conditions. Such a verifying apparatus, known to the person skilled in the art as a prober, has a housing having at least two housing sections, in one housing section of which, designated hereinafter as test chamber, the test substrate to be verified is held by a chuck and is set to a defined temperature, and in the other housing section of which, designated hereinafter as probe chamber, probes are held. For verification purposes, the test substrate and the probes are positioned relative to one another by means of at least one positioning device and the probes subsequently make contact with the test substrate.

Abstract translation: 一种用于在确定的热条件下在探测器中验证或测试测试基板，即晶片和其它电子半导体部件的方法和装置。 这种本领域技术人员已知的探测器的验证装置具有壳体，该壳体具有至少两个壳体部分，在其一个壳体部分中，下文称为测试室，待验证的测试基板由 卡盘并设定在限定的温度，并且在其另一个壳体部分中，下文称为探针室，探针被保持。 为了验证目的，测试基板和探针通过至少一个定位装置相对于彼此定位，并且探头随后与测试基板接触。

公开(公告)号：US20140028337A1

公开(公告)日：2014-01-30

申请号：US13953545

申请日：2013-07-29

Applicant: Cascade Microtech, Inc.

Inventor： Joerg Kiesewetter ,  Stojan Kanev ,  Michael Teich ,  Karsten Stoll ,  Axel Schmidt

IPC: G01R31/28

CPC classification number: G01R31/2891 ,  G01R31/2874

Abstract: In a method and a device for testing a test substrate under defined thermal conditions, a substrate that is to be tested is held by a temperature-controllable chuck and is set to a defined temperature; the test substrate is positioned relative to test probes by at least one positioning device; and the test probes make contact with the test substrate for testing purposes. At least one component of the positioning device that is present in the vicinity of the temperature-controlled test substrate is set to a temperature that is independent of the temperature of the test substrate by a temperature-controlling device, and this temperature is held constant.

Abstract translation: 在用于在限定的热条件下测试测试基板的方法和装置中，待测试的基板由温度可控的卡盘保持并设定在限定的温度; 测试基板通过至少一个定位装置相对于测试探针定位; 并且测试探针与测试基板接触以进行测试。 存在于受温度控制的测试基板附近的定位装置的至少一个部件通过温度控制装置设定为与测试基板的温度无关的温度，并且该温度保持恒定。