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公开(公告)号:US12092858B2
公开(公告)日:2024-09-17
申请号:US18158198
申请日:2023-01-23
Applicant: Cisco Technology, Inc.
Inventor: Jock T. Bovington , Matthew J. Traverso , Mark C. Nowell
CPC classification number: G02B6/0083 , G02B6/12 , G02B6/3863 , G02B6/4249
Abstract: Aspects include a pluggable optical device and related optical system. The pluggable optical device comprises a housing, a printed circuit board (PCB) within the housing, and one or more blind mate optical connectors attached to the PCB along a first end of the PCB. The pluggable optical device further comprises one or more electrical contacts of the PCB near the first end, one or more external optical connectors arranged near a second end of the PCB opposite the first end, and one or more optical components attached to the PCB and included in optical paths extending between the one or more external optical connectors and the one or more blind mate optical connectors.
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公开(公告)号:US11378751B2
公开(公告)日:2022-07-05
申请号:US16923852
申请日:2020-07-08
Applicant: Cisco Technology, Inc.
Inventor: Vipulkumar Patel , Matthew J. Traverso , Ashley J. Maker , Jock T. Bovington
Abstract: By determining an alignment point for a photonic element in a substrate of a given material; applying, via a laser aligned with the photonic element according to the alignment point, an etching pattern to the photonic element to produce a patterned region and an un-patterned region in the photonic element, wherein applying the etching pattern alters a chemical bond in the given material for the patterned region of the photonic element that increases a reactivity of the given material to an etchant relative to a reactivity of the un-patterned region, and wherein the patterned region defines an engagement feature in the un-patterned region that is configured to engage with a mating feature on a Photonic Integrated Circuit (PIC); and removing the patterned region from the photonic element via the etchant, various systems and methods may make use of laser patterning in optical components to enable alignment of optics to chips.
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公开(公告)号:US11101890B2
公开(公告)日:2021-08-24
申请号:US16933837
申请日:2020-07-20
Applicant: Cisco Technology, Inc.
Inventor: Marco Mazzini , Christopher R. S. Fludger , Alberto Cervasio , Matthew J. Traverso
IPC: H04B10/2507 , H04B10/524 , H04L25/49 , H04J14/02 , H04B1/04 , H04B10/2513 , H04B10/516 , H04B10/54 , H04B10/079
Abstract: The present disclosure provides signal management with unequal eye spacing by: determining a dispersion slope of a channel between a transmitter and a receiver based on a temperature of the transmitter and a wavelength used by the transmitter to transmit signals over the channel; determining maximum and minimum powers for transmission over the channel; assigning a plurality of rails to a corresponding plurality of power levels, wherein amplitude differences between adjacent rails of the plurality of rails are based on the dispersion slope and produce a first eye pattern with a first Ratio of Level Mismatch (RLM) less than one; encoding, by the transmitter, data onto a conditioned signal according to the plurality of rails; and transmitting the conditioned signal over the channel, so that the conditioned signal demonstrates a second eye pattern with a second RLM greater than the first RLM when received at the receiver.
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公开(公告)号:US10145758B2
公开(公告)日:2018-12-04
申请号:US15582306
申请日:2017-04-28
Applicant: Cisco Technology, Inc.
Inventor: Matthew J. Traverso , Ravi S. Tummidi , Mark A. Webster , Sandeep Razdan
Abstract: Embodiments herein describe techniques for testing optical components in a photonic chip using a testing structure disposed in a sacrificial region of a wafer. In one embodiment, the wafer is processed to form multiple photonic chips integrated into the wafer. While forming optical components in the photonic chips (e.g., modulators, detectors, waveguides, etc.), a testing structure can be formed in one or more sacrificial regions in the wafer. In one embodiment, the testing structure is arranged near an edge coupler in the photonic chip such that an optical signal can be transferred between the photonic chip and the testing structure. Moreover, the testing structure has a grating coupler disposed at or near a top surface of the wafer which permits optical signals to be transmitted into, or received from, the grating coupler when an optical probe is arranged above the grating coupler.
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公开(公告)号:US12044884B2
公开(公告)日:2024-07-23
申请号:US17653195
申请日:2022-03-02
Applicant: Cisco Technology, Inc.
Inventor: Matthew J. Traverso , Jock T. Bovington , Ashley J. M. Erickson
CPC classification number: G02B6/13 , G02B6/12004 , G02B6/30 , G02B6/4212
Abstract: Solder reflow compatible connections between optical components are provided by use of reflow compatible epoxies to bond optical components and remain bonded between the optical components at temperatures of at least 260 degrees Celsius for at least five minutes. In some embodiments, the reflow compatible epoxy is index matched to the optical channels in the optical components and is disposed in the light path therebetween. In some embodiments, a light path is defined between the optical channels through at least a portion of an air gap between the optical components.
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公开(公告)号:US11784175B2
公开(公告)日:2023-10-10
申请号:US17302853
申请日:2021-05-13
Applicant: Cisco Technology, Inc.
Inventor: Matthew J. Traverso , Sandeep Razdan , Ashley J. Maker
IPC: H01L23/00 , H01L25/16 , H01L31/02 , H01L23/498 , H01L21/48
CPC classification number: H01L25/167 , H01L21/4846 , H01L23/49827 , H01L23/49838 , H01L31/02005 , H01L23/49816 , H01L24/16 , H01L2224/16145 , H01L2224/16225
Abstract: An optoelectronic assembly and methods of fabrication thereof are provided. The assembly includes a mold compound; a photonic integrated circuit (PIC) embedded in the mold compound, that has a face exposed from the mold compound in a first plane; an interposer embedded in the mold compound, that has a face exposed from the mold compound in the first plane (i.e., co-planar with the exposed face of the PIC); and an electrical integrated circuit (EIC) coupled to the exposed face of the PIC and the exposed face of the interposer, that establishes bridging electrical connections between the PIC and the interposer.
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公开(公告)号:US11695254B2
公开(公告)日:2023-07-04
申请号:US18053993
申请日:2022-11-09
Applicant: Cisco Technology, Inc.
Inventor: Dominic F. Siriani , Jock T. Bovington , Matthew J. Traverso
CPC classification number: H01S5/2206 , H01S5/021 , H01S5/028
Abstract: An optical apparatus comprises a semiconductor substrate and a slab-coupled optical waveguide (SCOW) emitter disposed on the semiconductor substrate. The SCOW emitter comprises an optical waveguide comprising: a first region doped with a first conductivity type; a second region doped with a different, second conductivity type; and an optically active region disposed between the first region and the second region. The optically active region comprises a plurality of quantum dots.
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公开(公告)号:US11539189B2
公开(公告)日:2022-12-27
申请号:US16242984
申请日:2019-01-08
Applicant: Cisco Technology, Inc.
Inventor: Dominic F. Siriani , Jock T. Bovington , Matthew J. Traverso
Abstract: An optical apparatus comprises a semiconductor substrate and a slab-coupled optical waveguide (SCOW) emitter disposed on the semiconductor substrate. The SCOW emitter comprises an optical waveguide comprising: a first region doped with a first conductivity type; a second region doped with a different, second conductivity type; and an optically active region disposed between the first region and the second region. The optically active region comprises a plurality of quantum dots.
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公开(公告)号:US10962719B2
公开(公告)日:2021-03-30
申请号:US16260622
申请日:2019-01-29
Applicant: Cisco Technology, Inc.
Inventor: Sandeep Razdan , Ashley J. Maker , Jock T. Bovington , Matthew J. Traverso
IPC: G02B6/30
Abstract: Using laser patterning for an optical assembly, optical features are written into photonic elements at the end of a manufacturing sequence in order to prevent errors and damages to the optical features. The optical assembly is manufactured by affixing a photonic element to a substrate which includes one or more optical features and mapping one or more optical features for the photonic element. The optical features are then written into the fixed photonic element using laser patterning and the optical assembly is completed by connecting components, such as optical fibers, to the photonic element.
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公开(公告)号:US11373930B2
公开(公告)日:2022-06-28
申请号:US16836825
申请日:2020-03-31
Applicant: Cisco Technology, Inc.
Inventor: Ashley J. M. Erickson , Matthew J. Traverso , Sandeep Razdan , Joyce J. M. Peternel , Aparna R. Prasad
IPC: H01L23/473 , H01L21/48 , H01L21/683 , H01L23/00 , H01L21/78 , H01L23/544
Abstract: An opto-electronic package is described. The opto-electronic package is manufactured using a fan out wafer level packaging to produce dies/frames which include connection features. Additional structures such as heat exchanged structures are joined to a connection component and affixed to packages, using the connection features, to provide structural support and heat exchange to heat generating components in the package, among other functions.
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