Methods for encapsulating microelectromechanical (MEM) devices on a wafer scale
    1.
    发明授权
    Methods for encapsulating microelectromechanical (MEM) devices on a wafer scale 有权
    将微机电(MEM)器件封装在晶片上的方法

    公开(公告)号:US07863070B2

    公开(公告)日:2011-01-04

    申请号:US12049836

    申请日:2008-03-17

    IPC分类号: H01L21/00

    CPC分类号: B81C1/00293 B81C2203/0145

    摘要: Apparatus and methods are provided for enabling wafer-scale encapsulation of microelectromechanical (MEM) devices (e.g., resonators, filters) to protect the MEMs from the ambient and to provide either a controlled ambient or a reduced pressure. In particular, methods for wafer-scale encapsulation of MEM devices are provided, which enable encapsulation of MEM devices under desired ambient conditions that are not determined by the deposition conditions of a sealing process in which MEM release via holes are sealed or pinched-off, and which prevent sealing material from being inadvertently deposited on the MEM device during the sealing process.

    摘要翻译: 提供了设备和方法,用于实现微机电(MEM)装置(例如,谐振器,滤波器)的晶片级封装,以保护MEM免受环境影响,并提供受控的环境或减压。 特别地,提供了用于MEM器件的晶片级封装的方法,其能够在期望的环境条件下封装MEM器件,所述环境条件不是通过其中MEM释放通孔被密封或夹断的密封工艺的沉积条件来确定的, 并且其在密封过程中防止密封材料被无意中沉积在MEM装置上。

    Apparatus and Methods for Encapsulating Microelectromechanical (MEM) Devices on a Wafer Scale
    2.
    发明申请
    Apparatus and Methods for Encapsulating Microelectromechanical (MEM) Devices on a Wafer Scale 有权
    用于在晶片尺寸上封装微机电(MEM)器件的装置和方法

    公开(公告)号:US20080160679A1

    公开(公告)日:2008-07-03

    申请号:US12049836

    申请日:2008-03-17

    IPC分类号: H01L21/00

    CPC分类号: B81C1/00293 B81C2203/0145

    摘要: Apparatus and methods are provided for enabling wafer-scale encapsulation of microelectromechanical (MEM) devices (e.g., resonators, filters) to protect the MEMs from the ambient and to provide either a controlled ambient or a reduced pressure. In particular, methods for wafer-scale encapsulation of MEM devices are provided, which enable encapsulation of MEM devices under desired ambient conditions that are not determined by the deposition conditions of a sealing process in which MEM release via holes are sealed or pinched-off, and which prevent sealing material from being inadvertently deposited on the MEM device during the sealing process.

    摘要翻译: 提供了设备和方法,用于实现微机电(MEM)装置(例如,谐振器,滤波器)的晶片级封装,以保护MEM免受环境影响,并提供受控的环境或减压。 特别地,提供了用于MEM器件的晶片级封装的方法,其能够在期望的环境条件下封装MEM器件,所述环境条件不是通过其中MEM释放通孔被密封或夹断的密封过程的沉积条件来确定的, 并且其在密封过程中防止密封材料被无意中沉积在MEM装置上。

    Apparatus and methods for encapsulating microelectromechanical (MEM) devices on a wafer scale
    3.
    发明授权
    Apparatus and methods for encapsulating microelectromechanical (MEM) devices on a wafer scale 有权
    用于将微机电(MEM)器件封装在晶片上的装置和方法

    公开(公告)号:US07344907B2

    公开(公告)日:2008-03-18

    申请号:US10993548

    申请日:2004-11-19

    IPC分类号: H01L21/00

    CPC分类号: B81C1/00293 B81C2203/0145

    摘要: Apparatus and methods are provided for enabling wafer-scale encapsulation of microelectromechanical (MEM) devices (e.g., resonators, filters) to protect the MEMs from the ambient and to provide either a controlled ambient or a reduced pressure. In particular, methods for wafer-scale encapsulation of MEM devices are provided, which enable encapsulation of MEM devices under desired ambient conditions that are not determined by the deposition conditions of a sealing process in which MEM release via holes are sealed or pinched-off, and which prevent sealing material from being inadvertently deposited on the MEM device during the sealing process.

    摘要翻译: 提供了设备和方法,用于实现微机电(MEM)装置(例如,谐振器,滤波器)的晶片级封装,以保护MEM免受环境影响,并提供受控的环境或减压。 特别地,提供了用于MEM器件的晶片级封装的方法,其能够在期望的环境条件下封装MEM器件,所述环境条件不是通过其中MEM释放通孔被密封或夹断的密封过程的沉积条件来确定的, 并且其在密封过程中防止密封材料被无意中沉积在MEM装置上。

    Method and apparatus for providing parallel optoelectronic communication with an electronic device
    4.
    发明授权
    Method and apparatus for providing parallel optoelectronic communication with an electronic device 有权
    用于提供与电子设备的平行光电通信的方法和设备

    公开(公告)号:US06955481B2

    公开(公告)日:2005-10-18

    申请号:US10667234

    申请日:2003-09-17

    IPC分类号: G02B6/42 G02B6/36

    摘要: An optoelectronic assembly for an electronic system includes a support electronic chip set configured for at least one of providing multiplexing, demultiplexing, coding, decoding and optoelectronic transducer driving and receive functions. A first substrate having a first surface and an opposite second surface is in communication with the support electronic chip set via the first surface while a second substrate is in communication with the second surface of the first substrate. The second substrate is configured for mounting at least one of data processing, data switching and data storage chips. An optoelectronic transducer is in signal communication with the support electronic chip set and an optical fiber array is aligned at a first end with the optoelectronic transducer and with an optical signaling medium at a second end. An electrical signal from the support electronic chip set is communicated to the optoelectronic transducer via an electrical signaling medium, and the support electronic chip set and the optoelectronic transducer share a common thermal path for cooling.

    摘要翻译: 一种用于电子系统的光电组件,包括配置用于提供多路复用,解复用,编码,解码和光电换能器驱动和接收功能中的至少一个的支持电子芯片组。 具有第一表面和相对的第二表面的第一基板经由第一表面与支撑电子芯片组连通,而第二基板与第一基板的第二表面连通。 第二基板被配置用于安装数据处理,数据交换和数据存储芯片中的至少一个。 光电子传感器与支撑电子芯片组进行信号通信,光纤阵列在第一端与光电转换器对准,并在第二端与光信号介质对准。 来自支持电子芯片组的电信号通过电信号介质传送到光电转换器,并且支持电子芯片组和光电转换器共享用于冷却的公共热路径。

    Semiconductor device cooling module
    7.
    发明授权
    Semiconductor device cooling module 有权
    半导体器件冷却模块

    公开(公告)号:US08693200B2

    公开(公告)日:2014-04-08

    申请号:US13368031

    申请日:2012-02-07

    IPC分类号: H05K7/20

    摘要: A cooling module for cooling a semiconductor is provided and includes a land grid array (LGA) interposer, a substrate with an LGA side and a chip side, a cooler, a load frame attached to the substrate and formed to define an aperture in which the cooler is removably disposable, a spring clamp removably attachable to the load frame and configured to apply force from the load frame to the cooler such that the substrate and the cooler are urged together about the semiconductor and a load assembly device configured to urge the load frame and the LGA interposer together.

    摘要翻译: 提供了一种用于冷却半导体的冷却模块,其包括平台栅格阵列(LGA)插入器,具有LGA侧和芯片侧的衬底,冷却器,附接到衬底并形成以限定孔径的负载框架 冷却器可拆卸地是一次性的,弹簧夹可移除地附接到负载框架并且构造成将力从负载框架施加到冷却器,使得衬底和冷却器围绕半导体被一起被推动在一起;以及负载组件装置,其构造成推动负载框架 和LGA插入器在一起。

    INTRA-CONDENSER CONTAMINANT EXTRACTOR FOR A VAPOR-COMPRESSION REFRIGERATION APPARATUS
    9.
    发明申请
    INTRA-CONDENSER CONTAMINANT EXTRACTOR FOR A VAPOR-COMPRESSION REFRIGERATION APPARATUS 失效
    用于蒸气压缩制冷装置的冷凝器污染物萃取器

    公开(公告)号:US20130091886A1

    公开(公告)日:2013-04-18

    申请号:US13271290

    申请日:2011-10-12

    IPC分类号: F25B43/00 F25D31/00 B23P15/26

    摘要: Apparatuses and methods are provided for facilitating cooling of an electronic component. The apparatus includes a vapor-compression refrigeration system. The vapor-compression refrigeration system includes an expansion component, an evaporator, a compressor, and a condenser coupled in fluid communication via a refrigerant flow path. The evaporator is coupled to and cools the electronic component. The apparatus further includes a contaminant extractor coupled in fluid communication with the refrigerant flow path. The extractor includes a refrigerant boiling filter and a heater. At least a portion of refrigerant passing through the refrigerant flow path passes through the refrigerant boiling filter, and the heater provides heat to the refrigerant boiling filter to boil refrigerant passing through the filter. By boiling refrigerant passing through the filter, contaminants are extracted from the refrigerant, and are deposited in the refrigerant boiling filter.

    摘要翻译: 提供了便于冷却电子部件的装置和方法。 该装置包括蒸气压缩制冷系统。 蒸汽压缩式制冷系统包括膨胀部件,蒸发器,压缩机以及通过制冷剂流动路径流体连通的冷凝器。 蒸发器与电子部件联接并冷却。 该装置还包括与制冷剂流动路径流体连通地联接的污染物提取器。 提取器包括制冷剂沸腾过滤器和加热器。 通过制冷剂流路的制冷剂的至少一部分通过制冷剂沸腾过滤器,并且加热器向制冷剂沸腾过滤器提供热量以沸腾通过过滤器的制冷剂。 通过沸腾通过过滤器的制冷剂,污染物从制冷剂中排出,并沉积在制冷剂沸腾过滤器中。

    Processes for enhanced 3D integration and structures generated using the same
    10.
    发明授权
    Processes for enhanced 3D integration and structures generated using the same 有权
    用于增强3D集成和使用该集成生成的结构的过程

    公开(公告)号:US08330262B2

    公开(公告)日:2012-12-11

    申请号:US12698529

    申请日:2010-02-02

    IPC分类号: H01L23/02

    摘要: An enhanced 3D integration structure comprises a logic microprocessor chip bonded to a collection of vertically stacked memory slices and an optional set of outer vertical slices comprising optoelectronic devices. Such a device enables both high memory content in close proximity to the logic circuits and a high bandwidth for logic to memory communication. Additionally, the provision of optoelectronic devices in the outer slices of the vertical slice stack enables high bandwidth direct communication between logic processor chips on adjacent enhanced 3D modules mounted next to each other or on adjacent packaging substrates. A method to fabricate such structures comprises using a template assembly which enables wafer format processing of vertical slice stacks.

    摘要翻译: 增强的3D集成结构包括结合到垂直堆叠的存储器片的集合的逻辑微处理器芯片和包括光电子器件的可选的一组外部垂直片。 这样一种装置使得能够靠近逻辑电路的高存储器内容和用于逻辑到存储器通信的高带宽。 此外,在垂直切片堆叠的外切片中提供光电子器件可实现彼此相邻或相邻封装衬底上安装的相邻增强3D模块之间的逻辑处理器芯片之间的高带宽直接通信。 制造这种结构的方法包括使用能够对垂直切片堆叠进行晶片格式处理的模板组件。