Abstract:
A contact structure and assembly for a microelectronics device includes first and second electrically conductive contacts being helically shaped. A carrier element is attached to and positioned between the first and second contacts. The first and second contacts are in electrical communication with each other, and the first and second contacts are in a mirror image relationship with each other. A pair of insulating substrates each include electrically conductive members. A contact point on each of the first and second contacts is attached and electrically communicating to respective electrically conductive members such that the first and second electrically conductive contacts between the pair of insulating substrates form an electrically conductive package. A metal layer on the carrier element provides electrical conductivity through a first opening defined by the carrier element between the first and second portions of the helix shaped contact.
Abstract:
An method including forming multiple interconnect levels on top of one another, each level comprising a metal interconnect and a crack stop both embedded in a dielectric layer, and a dielectric capping layer directly on top of the dielectric layer and directly on top of the metal interconnect, the crack stop is an air gap which intersects an interface between the dielectric layer and the dielectric capping layer of each interconnect level, and forming a through substrate via through the multiple interconnect levels adjacent to, but not in direct contact with, the crack stop, the crack stop of each interconnect level is directly between the metal interconnect of each interconnect level and the through substrate via to prevent cracks caused during fabrication from propagating away from the through substrate via and damaging the metal interconnect.
Abstract:
An method including forming multiple interconnect levels on top of one another, each level comprising a metal interconnect and a crack stop both embedded in a dielectric layer, and a dielectric capping layer directly on top of the dielectric layer and directly on top of the metal interconnect, the crack stop is an air gap which intersects an interface between the dielectric layer and the dielectric capping layer of each interconnect level, and forming a through substrate via through the multiple interconnect levels adjacent to, but not in direct contact with, the crack stop, the crack stop of each interconnect level is directly between the metal interconnect of each interconnect level and the through substrate via to prevent cracks caused during fabrication from propagating away from the through substrate via and damaging the metal interconnect.