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公开(公告)号:US10049926B2
公开(公告)日:2018-08-14
申请号:US15146510
申请日:2016-05-04
Applicant: GLOBALFOUNDRIES INC.
Inventor: Junjing Bao , Wai-Kin Li
IPC: H01L21/768
Abstract: A dielectric material stack including at least a via level dielectric material layer, at least one patterned etch stop dielectric material portion, a line level dielectric material layer, and optionally a dielectric cap layer is formed over a substrate. At least one patterned hard mask layer including a first pattern can be formed above the dielectric material stack. A second pattern is transferred through the line level dielectric material layer employing the at least one etch stop dielectric material portion as an etch stop structure. The first pattern is transferred through the line level dielectric material layer employing the at least one etch stop dielectric material portion as an etch stop structure while the second pattern is transferred through the via level dielectric material layer to form integrated line and via trenches, which are filled with a conductive material to form integrated line and via structures.
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公开(公告)号:US09257391B2
公开(公告)日:2016-02-09
申请号:US13873356
申请日:2013-04-30
Applicant: GLOBALFOUNDRIES INC.
Inventor: Junjing Bao , Griselda Bonilla , Samuel S. Choi , Ronald G. Filippi , Naftali E. Lustig , Andrew H. Simon
IPC: H01L21/4763 , H01L21/44 , H01L23/532 , H01L23/528 , B82Y40/00 , B82Y30/00 , H01L21/768
CPC classification number: H01L23/53276 , B82Y30/00 , B82Y40/00 , H01L21/76831 , H01L21/76838 , H01L23/5283 , H01L23/53223 , H01L23/53238 , H01L23/53252 , H01L23/53266 , H01L2924/0002 , Y10S977/734 , Y10S977/842 , Y10S977/932 , H01L2924/00
Abstract: Hybrid metal-graphene interconnect structures and methods of forming the same. The structure may include a first end metal, a second end metal, a conductive line including one or more graphene portions extending from the first end metal to the second end metal, and one or more line barrier layers partially surrounding each of the one or more graphene portions. The conductive line may further include one or more intermediate metals separating each of the one or more graphene portions. Methods of forming said interconnect structures may include forming a plurality of metals including a first end metal and a second end metal in a dielectric layer, forming one or more line trenches between each of the plurality of metals, forming a line barrier layer in each of the one or more line trenches, and filling the one or more line trenches with graphene.
Abstract translation: 混合金属 - 石墨烯互连结构及其形成方法。 该结构可以包括第一端金属,第二端金属,包括从第一端金属延伸到第二端金属的一个或多个石墨烯部分的导电线,以及一个或多个部分围绕一个或多个 石墨烯部分。 导电线还可以包括分离一个或多个石墨烯部分中的每一个的一个或多个中间金属。 形成所述互连结构的方法可以包括在电介质层中形成包括第一端金属和第二端金属的多种金属,在多个金属中的每一个之间形成一个或多个管线沟槽,在每一个中形成线路阻挡层 一个或多个线沟槽,并用石墨烯填充一个或多个线沟槽。
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公开(公告)号:US09240376B2
公开(公告)日:2016-01-19
申请号:US13968467
申请日:2013-08-16
Applicant: GLOBALFOUNDRIES INC.
Inventor: Junjing Bao , Samuel S. Choi , Wai-Kin Li
IPC: H01L23/525 , H01L21/768
CPC classification number: H01L23/5256 , H01L21/31144 , H01L21/768 , H01L21/76802 , H01L21/76811 , H01L21/76816 , H01L2924/0002 , H01L2924/00
Abstract: A method including forming a first via opening in a substrate, the first via opening is self-aligned to a first trench in the substrate, forming a second via opening in the substrate, the second via opening is self-aligned to a second trench in the substrate, a portion of the second via opening overlaps a portion of the first via opening to form an overlap region, and the overlap region having a width (w) equal to or greater than a space (s) between the first trench and the second trench, and removing a portion of the substrate in the overlap region to form a bridge opening, the bridge opening is adjacent to the first and second via openings and extends between the first and second trenches.
Abstract translation: 一种方法,包括在衬底中形成第一通孔,所述第一通孔开口与所述衬底中的第一沟槽自对准,在所述衬底中形成第二通孔,所述第二通孔开口自对准至第二沟槽, 所述第二通孔开口的一部分与所述第一通路孔的一部分重叠以形成重叠区域,并且所述重叠区域的宽度(w)等于或大于所述第一沟槽和所述第二通路孔之间的空间 并且在所述重叠区域中移除所述基板的一部分以形成桥开口,所述桥开口与所述第一和第二通孔相邻,并且在所述第一沟槽和所述第二沟槽之间延伸。
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公开(公告)号:US09536842B2
公开(公告)日:2017-01-03
申请号:US14574430
申请日:2014-12-18
Applicant: GLOBALFOUNDRIES INC.
Inventor: Junjing Bao , Griselda Bonilla , Samuel S. Choi , Ronald G. Filippi , Xiao H. Liu , Naftali E. Lustig , Andrew H. Simon
IPC: H01L23/00 , H01L23/48 , H01L21/768
CPC classification number: H01L23/562 , H01L21/7682 , H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00
Abstract: An method including forming multiple interconnect levels on top of one another, each level comprising a metal interconnect and a crack stop both embedded in a dielectric layer, and a dielectric capping layer directly on top of the dielectric layer and directly on top of the metal interconnect, the crack stop is an air gap which intersects an interface between the dielectric layer and the dielectric capping layer of each interconnect level, and forming a through substrate via through the multiple interconnect levels adjacent to, but not in direct contact with, the crack stop, the crack stop of each interconnect level is directly between the metal interconnect of each interconnect level and the through substrate via to prevent cracks caused during fabrication from propagating away from the through substrate via and damaging the metal interconnect.
Abstract translation: 一种包括在彼此之上形成多个互连层的方法,每个层包括金属互连和嵌入在电介质层中的裂纹阻挡层,以及直接位于介电层顶部并且直接位于金属互连顶部的电介质覆盖层 裂缝停止是与每个互连层的电介质层和电介质覆盖层之间的界面相交的气隙,并且通过与裂纹停止相邻但不直接接触的多个互连层形成通孔基板通孔 每个互连级别的裂纹停止点直接位于每个互连级别的金属互连和贯通基板通孔之间,以防止制造过程中产生的裂纹从穿过基板传播并损坏金属互连。
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公开(公告)号:US09431346B2
公开(公告)日:2016-08-30
申请号:US14454765
申请日:2014-08-08
Applicant: GLOBALFOUNDRIES INC.
Inventor: Junjing Bao , Griselda Bonilla , Samuel S. Choi , Ronald G. Filippi , Andrew T. Kim , Naftali E. Lustig , Andrew H. Simon
IPC: H01L21/47 , H01L21/44 , H01L23/532 , H01L23/525 , B82Y40/00 , B82Y30/00
CPC classification number: H01L23/53276 , B82Y30/00 , B82Y40/00 , H01L23/5256 , H01L23/53223 , H01L23/53238 , H01L23/53252 , H01L23/53266 , H01L2924/0002 , Y10S977/734 , Y10S977/794 , Y10S977/842 , Y10S977/932 , H01L2924/00
Abstract: A structure including an Mx level including a first Mx metal, a second Mx metal, and a third Mx metal abutting and electrically connected in sequence with one another, the second Mx metal including graphene, and an Mx+1 level above the Mx level, the Mx+1 level including an Mx+1 metal and a via, the via electrically connects the third Mx metal to the Mx+1 metal in a vertical orientation.
Abstract translation: 包括Mx级的结构,所述Mx级包括彼此顺序地邻接和电连接的第一Mx金属,第二Mx金属和第三Mx金属,所述第二Mx金属包括石墨烯,以及Mx级以上的Mx + 1级, Mx + 1电平包括Mx + 1金属和通孔,通孔以垂直方向将第三Mx金属电连接到Mx + 1金属。
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公开(公告)号:US20160181208A1
公开(公告)日:2016-06-23
申请号:US14574430
申请日:2014-12-18
Applicant: GLOBALFOUNDRIES INC.
Inventor: Junjing Bao , Griselda Bonilla , Samuel S. Choi , Ronald G. Filippi , Xiao H. Liu , Naftali E. Lustig , Andrew H. Simon
IPC: H01L23/00 , H01L23/48 , H01L21/768
CPC classification number: H01L23/562 , H01L21/7682 , H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00
Abstract: An method including forming multiple interconnect levels on top of one another, each level comprising a metal interconnect and a crack stop both embedded in a dielectric layer, and a dielectric capping layer directly on top of the dielectric layer and directly on top of the metal interconnect, the crack stop is an air gap which intersects an interface between the dielectric layer and the dielectric capping layer of each interconnect level, and forming a through substrate via through the multiple interconnect levels adjacent to, but not in direct contact with, the crack stop, the crack stop of each interconnect level is directly between the metal interconnect of each interconnect level and the through substrate via to prevent cracks caused during fabrication from propagating away from the through substrate via and damaging the metal interconnect.
Abstract translation: 一种包括在彼此之上形成多个互连层的方法,每个层包括金属互连和嵌入在电介质层中的裂纹阻挡层,以及直接位于介电层顶部并且直接位于金属互连顶部的电介质覆盖层 裂缝停止是与每个互连层的电介质层和电介质覆盖层之间的界面相交的气隙,并且通过与裂纹停止相邻但不直接接触的多个互连层形成通孔基板通孔 每个互连级别的裂纹停止点直接位于每个互连级别的金属互连和贯通基板通孔之间,以防止制造过程中产生的裂纹从穿过基板传播并损坏金属互连。
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公开(公告)号:US20160104677A1
公开(公告)日:2016-04-14
申请号:US14975726
申请日:2015-12-19
Applicant: GLOBALFOUNDRIES INC.
Inventor: Junjing Bao , Samuel S. Choi , Wai-kin Li
IPC: H01L23/525
CPC classification number: H01L23/5256 , H01L21/31144 , H01L21/768 , H01L21/76802 , H01L21/76811 , H01L21/76816 , H01L2924/0002 , H01L2924/00
Abstract: A method including forming a first via opening in a substrate, the first via opening is self-aligned to a first trench in the substrate, forming a second via opening in the substrate, the second via opening is self-aligned to a second trench in the substrate, a portion of the second via opening overlaps a portion of the first via opening to form an overlap region, and the overlap region having a width (w) equal to or greater than a space (s) between the first trench and the second trench, and removing a portion of the substrate in the overlap region to form a bridge opening, the bridge opening is adjacent to the first and second via openings and extends between the first and second trenches.
Abstract translation: 一种方法,包括在衬底中形成第一通孔,所述第一通孔开口与所述衬底中的第一沟槽自对准,在所述衬底中形成第二通孔,所述第二通孔开口自对准至第二沟槽, 所述第二通孔开口的一部分与所述第一通路孔的一部分重叠以形成重叠区域,并且所述重叠区域的宽度(w)等于或大于所述第一沟槽和所述第二通路孔之间的空间 并且在所述重叠区域中移除所述基板的一部分以形成桥开口,所述桥开口与所述第一和第二通孔相邻,并且在所述第一沟槽和所述第二沟槽之间延伸。
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公开(公告)号:US10186482B2
公开(公告)日:2019-01-22
申请号:US14975726
申请日:2015-12-19
Applicant: GLOBALFOUNDRIES INC.
Inventor: Junjing Bao , Samuel S. Choi , Wai-kin Li
IPC: H01L23/525 , H01L23/528 , H01L21/768 , H01L21/311
Abstract: A method including forming a first via opening in a substrate, the first via opening is self-aligned to a first trench in the substrate, forming a second via opening in the substrate, the second via opening is self-aligned to a second trench in the substrate, a portion of the second via opening overlaps a portion of the first via opening to form an overlap region, and the overlap region having a width (w) equal to or greater than a space (s) between the first trench and the second trench, and removing a portion of the substrate in the overlap region to form a bridge opening, the bridge opening is adjacent to the first and second via openings and extends between the first and second trenches.
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公开(公告)号:US20160247716A1
公开(公告)日:2016-08-25
申请号:US15146510
申请日:2016-05-04
Applicant: GLOBALFOUNDRIES INC.
Inventor: Junjing Bao , Wai-Kin Li
IPC: H01L21/768
CPC classification number: H01L21/76877 , H01L21/76802 , H01L21/7681 , H01L21/76811 , H01L21/76813 , H01L21/76816 , H01L21/7684
Abstract: A dielectric material stack including at least a via level dielectric material layer, at least one patterned etch stop dielectric material portion, a line level dielectric material layer, and optionally a dielectric cap layer is formed over a substrate. At least one patterned hard mask layer including a first pattern can be formed above the dielectric material stack. A second pattern is transferred through the line level dielectric material layer employing the at least one etch stop dielectric material portion as an etch stop structure. The first pattern is transferred through the line level dielectric material layer employing the at least one etch stop dielectric material portion as an etch stop structure while the second pattern is transferred through the via level dielectric material layer to form integrated line and via trenches, which are filled with a conductive material to form integrated line and via structures.
Abstract translation: 包括至少一个通孔级电介质材料层,至少一个图案化的蚀刻停止介电材料部分,一行电介质材料层和任选的电介质盖层的电介质材料堆叠在衬底上。 包括第一图案的至少一个图案化的硬掩模层可以形成在介电材料堆叠的上方。 使用至少一个蚀刻停止介电材料部分作为蚀刻停止结构,通过线路电介质材料层转移第二图案。 第一图案通过采用至少一个蚀刻停止介电材料部分的线路电介质材料层转移作为蚀刻停止结构,而第二图案通过通孔级电介质材料层转移以形成集成线和通孔沟槽, 填充导电材料以形成集成线路和通孔结构。
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公开(公告)号:US09425144B2
公开(公告)日:2016-08-23
申请号:US14580539
申请日:2014-12-23
Applicant: GLOBALFOUNDRIES INC.
Inventor: Griselda Bonilla , Kaushik Chanda , Samuel S. Choi , Ronald G. Filippi , Stephan Grunow , Naftali Lustig , Andrew H. Simon , Junjing Bao
IPC: H01L21/44 , H01L23/525 , H01H69/02 , H01H85/046 , H01L23/522 , H01L23/528 , H01H85/02
CPC classification number: H01L23/5256 , H01H69/02 , H01H85/046 , H01H2085/0275 , H01L23/5226 , H01L23/528 , H01L2924/0002 , Y10T29/49107 , H01L2924/00
Abstract: Structure providing more reliable fuse blow location, and method of making the same. A vertical metal fuse blow structure has, prior to fuse blow, an intentionally damaged portion of the fuse conductor. The damaged portion helps the fuse blow in a known location, thereby decreasing the resistance variability in post-blow circuits. At the same time, prior to fuse blow, the fuse structure is able to operate normally. The damaged portion of the fuse conductor is made by forming an opening in a cap layer above a portion of the fuse conductor, and etching the fuse conductor. Preferably, the opening is aligned such that the damaged portion is on the top corner of the fuse conductor. A cavity can be formed in the insulator adjacent to the damaged fuse conductor. The damaged fuse structure having a cavity can be easily incorporated in a process of making integrated circuits having air gaps.
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