公开(公告)号：US10818772B2

公开(公告)日：2020-10-27

申请号：US15961364

申请日：2018-04-24

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Vibhor Jain ,  Pernell Dongmo ,  Cameron Luce ,  James W. Adkisson ,  Qizhi Liu

IPC: H01L29/66 ,  H01L29/737 ,  H01L29/10 ,  H01L29/08 ,  H01L29/06

Abstract: Fabrication methods and device structures for a heterojunction bipolar transistor. A trench isolation region is formed that surrounds an active region of semiconductor material, a collector is formed in the active region, and a base layer is deposited that includes a first section over the trench isolation region, a second section over the active region, and a third section over the active region that connects the first section and the second section. An emitter is arranged over the second section of the base layer, and an extrinsic base layer is arranged over the first section of the base layer and the third section of the base layer. The extrinsic base layer includes a first section containing polycrystalline semiconductor material and a second section containing single-crystal semiconductor material. The first and second sections of the extrinsic base layer intersect along an interface that extends over the trench isolation region.

公开(公告)号：US09425269B1

公开(公告)日：2016-08-23

申请号：US14747604

申请日：2015-06-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： James W. Adkisson ,  Jeffrey P. Gambino ,  Anthony K. Stamper

IPC: H01L21/768 ,  H01L29/417 ,  H01L29/40

CPC classification number: H01L29/41708 ,  H01L21/76804 ,  H01L21/76829 ,  H01L29/401 ,  H01L29/73

Abstract: Device structures for a bipolar junction transistor and methods for fabricating such device structures. An emitter structure is formed that has a semiconductor layer with a top surface defining a recess and a sacrificial layer comprised of a disposable material in the recess. A contact opening is formed that extends through one or more first dielectric layers to the sacrificial layer. After the contact opening is formed, the sacrificial layer is removed from the recess. Alternatively, the layer in the recess may be comprised of a non-disposable material that may occupy the recess at the time that a contact is formed in the contact opening.

Abstract translation: 双极结型晶体管的器件结构及其制造方法。 形成发射体结构，其具有半导体层，其具有限定凹部的顶表面和在凹部中由一次性材料构成的牺牲层。 形成了延伸穿过一个或多个第一介电层到牺牲层的接触开口。 在形成接触开口之后，从凹部移除牺牲层。 或者，凹部中的层可以由在接触开口中形成接触时可能占据凹部的非一次性材料构成。

公开(公告)号：US10580689B2

公开(公告)日：2020-03-03

申请号：US15856525

申请日：2017-12-28

Applicant: GLOBALFOUNDRIES INC.

Inventor： James W. Adkisson ,  Anthony K. Stamper

IPC: H01L29/423 ,  H01L29/66 ,  H01L29/732 ,  H01L29/737 ,  H01L29/08 ,  H01L29/10 ,  H01L27/06 ,  H01L23/485 ,  H01L21/768 ,  H01L21/8249 ,  H01L21/02

Abstract: An advanced contact module for optimizing emitter and contact resistance and methods of manufacture are disclosed. The method includes forming a first contact via to a first portion of a first device. The method further includes filling the first contact via with metal material to form a first metal contact to the first portion of the first device. The method further includes forming additional contact vias to other portions of the first device and contacts of a second device. The method further includes cleaning the additional contact vias while protecting the first metal contact of the first portion of the first device. The method further includes filling the additional contact vias with metal material to form additional metal contacts to the other portions of the first device and the second device.

公开(公告)号：US20170365775A1

公开(公告)日：2017-12-21

申请号：US15690828

申请日：2017-08-30

Applicant: GLOBALFOUNDRIES INC.

Inventor： James W. Adkisson ,  Panglijen Candra ,  Thomas J. Dunbar ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Anthony K. Stamper ,  Randy L. Wolf

IPC: H01L41/293 ,  H01L41/25 ,  G06F17/50 ,  H01L21/768 ,  H01L23/00 ,  H01L41/08 ,  H03H9/64 ,  H01L23/48 ,  H01L27/06 ,  H01L25/16 ,  H01L23/66 ,  H01L49/02

Abstract: A design structure for an integrated radio frequency (RF) filter on a backside of a semiconductor substrate includes: a device on a first side of a substrate; a radio frequency (RF) filter on a backside of the substrate; and at least one substrate conductor extending from the front side of the substrate to the backside of the substrate and electrically coupling the RF filter to the device.

公开(公告)号：US09608096B1

公开(公告)日：2017-03-28

申请号：US14874039

申请日：2015-10-02

Applicant: GLOBALFOUNDRIES INC.

Inventor： Renata Camillo-Castillo ,  Qizhi Liu ,  Vibhor Jain ,  James W. Adkisson ,  David L. Harame

IPC: H01L29/49 ,  H01L29/732 ,  H01L21/762 ,  H01L29/66 ,  H01L21/225 ,  H01L21/02 ,  H01L29/04 ,  H01L29/06

CPC classification number: H01L29/732 ,  H01L21/76 ,  H01L21/762 ,  H01L29/0642 ,  H01L29/0821 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/7371

Abstract: Device structure and fabrication methods for a bipolar junction transistor. One or more trench isolation regions are formed in a substrate to define a device region having a first width. A protect layer is formed on a top surface of the one or more trench isolation regions and a top surface of the device region. An opening is formed in the protect layer. The opening is coincides with the top surface of the first device region and has a second width that is less than or equal to the first width of the first device region. A base layer is formed that has a first section on the device region inside the first opening and a second section on the protect layer.

公开(公告)号：US10559743B2

公开(公告)日：2020-02-11

申请号：US15690828

申请日：2017-08-30

Applicant: GLOBALFOUNDRIES INC.

Inventor： James W. Adkisson ,  Panglijen Candra ,  Thomas J. Dunbar ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Anthony K. Stamper ,  Randy L. Wolf

IPC: H01L41/293 ,  H01L21/768 ,  H01L23/48 ,  H01L23/00 ,  H03H9/64 ,  G06F17/50 ,  H01L41/08 ,  H01L41/25 ,  H01L23/66 ,  H01L25/16 ,  H01L27/06 ,  H01L49/02

Abstract: A design structure for an integrated radio frequency (RF) filter on a backside of a semiconductor substrate includes: a device on a first side of a substrate; a radio frequency (RF) filter on a backside of the substrate; and at least one substrate conductor extending from the front side of the substrate to the backside of the substrate and electrically coupling the RF filter to the device.

公开(公告)号：US10331844B2

公开(公告)日：2019-06-25

申请号：US15290569

申请日：2016-10-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Vibhor Jain ,  James W. Adkisson

IPC: G06F17/50 ,  H01L27/082 ,  H01L21/8222 ,  H01L21/027

Abstract: Methods for designing and fabricating a current mirror. A first layout is received for a first back-end-of-line (BEOL) stack that is coupled with an emitter of a bipolar junction transistor in a current mirror that has a first current ratio. A second layout for a second back-end-of-line (BEOL) stack, which differs from the first BEOL stack, is determined such that, when the second BEOL stack is coupled with the emitter of the bipolar junction transistor, the first current ratio is changed to a second current ratio. The change from the first current ratio to the second current ratio, which is based on the change from the first layout for the first BEOL stack to the second layout for the second BEOL stack, is accomplished without changing a front-end-of-line (FEOL) layout of the bipolar junction transistor.

公开(公告)号：US10217852B1

公开(公告)日：2019-02-26

申请号：US15948486

申请日：2018-04-09

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Qizhi Liu ,  Vibhor Jain ,  James W. Adkisson ,  James R. Elliott

IPC: H01L23/552 ,  H01L29/737 ,  H01L29/10 ,  H01L21/306 ,  H01L29/06 ,  H01L29/66 ,  H01L29/04

Abstract: Device structures and fabrication methods for heterojunction bipolar transistors. A trench isolation region surrounds an active region that includes a collector, and a base layer includes a first section composed of a single-crystal semiconductor material that is arranged over the active region and a second section composed of polycrystalline semiconductor material that is arranged over the trench isolation region. A first semiconductor layer of the second section of the base layer is removed selective to a second semiconductor layer of the second section of the base layer to define a gap arranged in a vertical direction between the second semiconductor layer of the second section of the base layer and the trench isolation region. An emitter is formed on the first section of the base layer.

公开(公告)号：US20180102289A1

公开(公告)日：2018-04-12

申请号：US15290569

申请日：2016-10-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Vibhor Jain ,  James W. Adkisson

IPC: H01L21/8222 ,  H01L27/082 ,  G06F17/50 ,  H01L21/027

CPC classification number: G06F17/5081 ,  G06F17/5063 ,  G06F17/5068 ,  G06F2217/12 ,  H01L21/0274 ,  H01L21/8222 ,  H01L27/082 ,  H01L27/0823

Abstract: Methods for designing and fabricating a current mirror. A first layout is received for a first back-end-of-line (BEOL) stack that is coupled with an emitter of a bipolar junction transistor in a current mirror that has a first current ratio. A second layout for a second back-end-of-line (BEOL) stack, which differs from the first BEOL stack, is determined such that, when the second BEOL stack is coupled with the emitter of the bipolar junction transistor, the first current ratio is changed to a second current ratio. The change from the first current ratio to the second current ratio, which is based on the change from the first layout for the first BEOL stack to the second layout for the second BEOL stack, is accomplished without changing a front-end-of-line (FEOL) layout of the bipolar junction transistor.

公开(公告)号：US20190326411A1

公开(公告)日：2019-10-24

申请号：US15961364

申请日：2018-04-24

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Vibhor Jain ,  Pernell Dongmo ,  Cameron Luce ,  James W. Adkisson ,  Qizhi Liu

IPC: H01L29/66 ,  H01L29/737 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10

Abstract: Fabrication methods and device structures for a heterojunction bipolar transistor. A trench isolation region is formed that surrounds an active region of semiconductor material, a collector is formed in the active region, and a base layer is deposited that includes a first section over the trench isolation region, a second section over the active region, and a third section over the active region that connects the first section and the second section. An emitter is arranged over the second section of the base layer, and an extrinsic base layer is arranged over the first section of the base layer and the third section of the base layer. The extrinsic base layer includes a first section containing polycrystalline semiconductor material and a second section containing single-crystal semiconductor material. The first and second sections of the extrinsic base layer intersect along an interface that extends over the trench isolation region.