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公开(公告)号：US09847378B2
公开(公告)日：2017-12-19
申请号：US15306125
申请日：2014-04-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Xia Sheng , Yoocharn Jeon , Jianhua Yang , Hans S. Cho , Richard H. Henze
CPC classification number: H01L27/2463 , G11C13/0002 , G11C13/003 , G11C2213/52 , G11C2213/71 , G11C2213/73 , H01L27/2481 , H01L27/249 , H01L45/08 , H01L45/1233 , H01L45/1253 , H01L45/1273 , H01L45/145 , H01L45/146 , H01L45/16 , H01L45/1616 , H01L45/1675 , H01L45/1683
Abstract: A resistive memory device includes a conductor and a resistive memory stack in contact with the conductor. The resistive memory stack includes a multi-component electrode and a switching region. The multi-component electrode includes a base electrode having a surface, and an inert material electrode on the base electrode surface in a form of i) a thin layer, or ii) discontinuous nano-islands. A switching region is in contact with the conductor and with the inert material electrode when the inert material electrode is in the form of the thin layer; or the switching region is in contact with the conductor, with the inert material electrode, and with an oxidized portion of the base electrode when the inert material electrode is in the form of the discontinuous nano-islands.
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Patent Agency Ranking
公开(公告)号：US20170053968A1
公开(公告)日：2017-02-23
申请号：US15306125
申请日：2014-04-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Xia Sheng , Yoocharn Jeon , Jianhua Yang , Hans S. Cho , Richard H. Henze
CPC classification number: H01L27/2463 , G11C13/0002 , G11C13/003 , G11C2213/52 , G11C2213/71 , G11C2213/73 , H01L27/2481 , H01L27/249 , H01L45/08 , H01L45/1233 , H01L45/1253 , H01L45/1273 , H01L45/145 , H01L45/146 , H01L45/16 , H01L45/1616 , H01L45/1675 , H01L45/1683
Abstract: A resistive memory device includes a conductor and a resistive memory stack in contact with the conductor. The resistive memory stack includes a multi-component electrode and a switching region. The multi-component electrode includes a base electrode having a surface, and an inert material electrode on the base electrode surface in a form of i) a thin layer, or ii) discontinuous nano-islands. A switching region is in contact with the conductor and with the inert material electrode when the inert material electrode is in the form of the thin layer; or the switching region is in contact with the conductor, with the inert material electrode, and with an oxidized portion of the base electrode when the inert material electrode is in the form of the discontinuous nano-islands.
Abstract translation: 电阻式存储器件包括与导体接触的导体和电阻式存储器堆叠。 电阻式存储器堆叠包括多组分电极和开关区域。 多组分电极包括具有表面的基极电极和基极电极表面上的惰性材料电极，其形式为i）薄层，或ii）不连续的纳米岛。 当惰性材料电极为薄层形式时，开关区域与导体和惰性材料电极接触; 或者当惰性材料电极为不连续的纳米岛的形式时，开关区域与惰性材料电极接触导体，并与基极的氧化部分接触。
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公开(公告)号：US20180006088A1
公开(公告)日：2018-01-04
申请号：US15539929
申请日：2015-01-26
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Xia Sheng , Kyung Min , Gary Gibson
CPC classification number: H01L27/2463 , H01L27/2409 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/1266
Abstract: One example includes a resistive random access memory (ReRAM) device. The device includes a set of electrodes to receive a voltage. The device also includes a memristor element to at least one of store and readout a memory state in response to a current that flows through the ReRAM device in response to the voltage. The device further includes a selector element having a dynamic current-density area with respect to the voltage.
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公开(公告)号：US20240315053A1
公开(公告)日：2024-09-19
申请号：US18184222
申请日：2023-03-15
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： JINSUNG YOUN , Xia Sheng , James Ignowski , Darrin Miller , Catherine Graves
CPC classification number: H10B80/00 , H01L24/16 , H01L24/17 , H01L23/481 , H01L2224/16145 , H01L2224/16225 , H01L2224/17181 , H01L2924/1433 , H01L2924/1443
Abstract: Examples of the present technology provide heterogeneous (i.e., multi-chip) ASIC-memristor integrations that enable high voltage-dependent precision memristor programming while preserving optimal ASIC performance/capabilities. Examples achieve these advantages by “de-coupling” memristor hardware from ASIC chip. Accordingly, a heterogeneous ASIC-memristor integration of the present technology may comprise an ASIC chip packaged onto a functional “memristor-interposer” chip. The memristor interposer may serve both a functional and structural purpose. Namely, memristors of the memristor interposer can be leveraged in conjunction with the ASIC for processing/computation functions—while connections within the memristor interposer route signals between ASIC and computing system (e.g., between the ASIC and a printed circuit board).
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公开(公告)号：US10930343B2
公开(公告)日：2021-02-23
申请号：US16107063
申请日：2018-08-21
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Amit S. Sharma , Suhas Kumar , Xia Sheng
Abstract: A memristor device includes a first electrode, a second electrode, and a memristor layer disposed between the first electrode and the second electrode. The memristor layer is formed of a metal oxide. The memristor layer includes a plurality of regions that extend between the first electrode and the second electrode. The plurality of regions of the memristor layer are created with different concentrations of oxygen before electrical operation, and, during electrical operation, a voltage-conductance characteristic of the memristor device is controlled based on the different concentrations of oxygen of the plurality of regions. The controlling of the voltage-conductance characteristic includes increasing or decreasing the conductance of the memristor device toward a target conductance at a specific voltage.
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公开(公告)号：US20200066340A1
公开(公告)日：2020-02-27
申请号：US16107063
申请日：2018-08-21
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Amit S. Sharma , Suhas Kumar , Xia Sheng
Abstract: A memristor device includes a first electrode, a second electrode, and a memristor layer disposed between the first electrode and the second electrode. The memristor layer is formed of a metal oxide. The memristor layer includes a plurality of regions that extend between the first electrode and the second electrode. The plurality of regions of the memristor layer are created with different concentrations of oxygen before electrical operation, and, during electrical operation, a voltage-conductance characteristic of the memristor device is controlled based on the different concentrations of oxygen of the plurality of regions. The controlling of the voltage-conductance characteristic includes increasing or decreasing the conductance of the memristor device toward a target conductance at a specific voltage.
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