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    SEMICONDUCTOR DEVICE WITH INPUT PROTECTION
    1.
    发明申请
    SEMICONDUCTOR DEVICE WITH INPUT PROTECTION 有权

    公开(公告)号：US20240372358A1

    公开(公告)日：2024-11-07

    申请号：US18640068

    申请日：2024-04-19

    Applicant: Infineon Technologies AG

    Inventor： Markus Seebacher ,  Herwig Wappis

    IPC: H02H9/04 ,  H01L27/02 ,  H03K17/687

    Abstract: A semiconductor device has an analogue-to-digital converter (ADC) driven by a plurality of analogue input channels, each having an input pad and an input node connected to the input pad. The input node is connected to an input of the ADC through a respective switch. The analogue input channels comprise a high-side clamp transistor connected between the input node and a high-side power rail, a high-side comparator to clamp the input node to a high-side clamp voltage when the voltage at the input node exceeds a high-side comparison voltage, a low-side clamp transistor connected between the input node and a low-side power rail, and a low-side comparator for turning on the low-side clamp transistor to clamp the input node to a low-side clamp voltage when the voltage at the input node falls below a low-side comparison voltage.

    Circuit with capacitors and corresponding method
    3.
    发明授权
    Circuit with capacitors and corresponding method 有权

    公开(公告)号：US10916321B2

    公开(公告)日：2021-02-09

    申请号：US16774722

    申请日：2020-01-28

    Applicant: Infineon Technologies AG

    Inventor： Herwig Wappis ,  Peter Bogner

    IPC: G11C27/02 ,  H03M1/12

    Abstract: A circuit having capacitors, and corresponding method. A circuit and corresponding methods are provided. A controller causes a first capacitor to be connected to an input connection in a first operating phase, charge to be transferred from the first capacitor to a second capacitor in a second operating phase and charge to be transferred from the second capacitor to a processing circuit in a third operating phase. The input connection and the second capacitor belong to different voltage domains.

    SWITCHING CIRCUITRY, DC-INTERFACE AND METHOD FOR OPERATING A SWITCHING CIRCUITRY
    7.
    发明申请
    SWITCHING CIRCUITRY, DC-INTERFACE AND METHOD FOR OPERATING A SWITCHING CIRCUITRY 审中-公开

    公开(公告)号：US20180145673A1

    公开(公告)日：2018-05-24

    申请号：US15783718

    申请日：2017-10-13

    Applicant: Infineon Technologies AG

    Inventor： Peter Bogner ,  Herwig Wappis

    IPC: H03K17/08 ,  H02M3/07

    CPC classification number: H03K17/08 ,  H02M3/07 ,  H03K17/08104 ,  H03K2217/0063 ,  H03K2217/0081

    Abstract: A switching circuitry is configured to provide, during an ON-State, a connection between a first port and second port and to electrically disconnect, during an OFF-State, the first port from the second port. The switching interface comprises a first and a second cascode transistor element having an applicable operational voltage and comprising a control terminal, wherein the first cascode transistor element is connected with the first port of the switching interface and wherein the second cascode transistor element is connected with the second port of the switching interface. The switching interface comprises a switching transistor element, having the applicable operational voltage and comprising a third control terminal, the switching transistor element being serially connected the first and second cascode transistor elements. A supply signal arrangement is connected to the control terminals and configured to provide a first control voltage to the first control terminal, a second control voltage to the second control terminal and to provide a third control voltage to the third control terminal. Each of the cascode transistor elements and the switching transistor element is connected to an adjusting circuitry being connected between the respective control terminal and a reference potential and being configured to adjust the respective control voltage, so that, during the ON-State, the voltage difference between the respective control voltage and the input voltage is less than the applicable operational voltage. A maximum voltage level of the input voltage is higher than the applicable operational voltage.

    CLAMP CIRCUITS
    9.
    发明公开
    CLAMP CIRCUITS 审中-公开

    公开(公告)号：US20240340001A1

    公开(公告)日：2024-10-10

    申请号：US18610589

    申请日：2024-03-20

    Applicant: Infineon Technologies AG

    Inventor： Dieter Draxelmayr ,  Herwig Wappis

    IPC: H03K17/30 ,  H03K17/081 ,  H03K17/10

    CPC classification number: H03K17/302 ,  H03K17/08104 ,  H03K17/102

    Abstract: A clamp circuit including a first transistor having a control connection coupled to a first reference voltage terminal and a first controlled connection coupled to an input voltage terminal. The clamp circuit includes a second transistor having a control connection configured to receive a control voltage that is dependent on a current flowing through the first transistor, a first controlled connection coupled to the input voltage terminal, and a second controlled connection coupled to a second reference voltage terminal.

    Using a sampling switch for multiple evaluation units
    10.
    发明授权
    Using a sampling switch for multiple evaluation units 有权

    公开(公告)号：US11265006B2

    公开(公告)日：2022-03-01

    申请号：US16058749

    申请日：2018-08-08

    Applicant: Infineon Technologies AG

    Inventor： Jens Barrenscheen ,  Peter Bogner ,  Herwig Wappis

    IPC: H03M1/00 ,  H03M1/12

    Abstract: In some examples, an integrated circuit device includes a sampling switch configured to sample an input signal. The integrated circuit device also includes a first evaluation unit configured to receive the sampled input signal from the sampling switch and evaluate the sampled input signal. The integrated circuit device further includes a second evaluation unit configured to receive the sampled input signal from the sampling switch and evaluate the sampled input signal. The sampling switch is configured to deliver the sampled input signal to the first evaluation unit and deliver the sampled input signal to the second evaluation unit.

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