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公开(公告)号:US20160111255A1
公开(公告)日:2016-04-21
申请号:US14977625
申请日:2015-12-21
Applicant: Infineon Technologies AG
Inventor: Manfred Engelhardt , Gudrun Stranzl , Markus Zundel , Hubert Maier
IPC: H01J37/32
CPC classification number: H01J37/32009 , B28D5/00 , H01J2237/334 , H01L21/6835 , H01L21/6836 , H01L21/78 , H01L2221/68327 , H01L2221/68336 , H01L2221/6834
Abstract: Various methods and apparatuses are provided relating to separation of a substrate into a plurality of parts. For example, first a partial separation is performed and then the partially separated substrate is completely separated into a plurality of parts.
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公开(公告)号:US20150115448A1
公开(公告)日:2015-04-30
申请号:US14066777
申请日:2013-10-30
Applicant: Infineon Technologies AG
Inventor: Hubert Maier
IPC: H01L21/82 , H01L21/768 , H01L21/306 , H01L23/31
CPC classification number: H01L21/82 , H01L21/306 , H01L21/561 , H01L21/7685 , H01L21/78 , H01L23/3114 , H01L23/3157 , H01L23/3185 , H01L2924/0002 , H01L2924/00
Abstract: A method for processing a wafer including a plurality of chips is provided. The method may include: forming a trench in the wafer between the plurality of chips; forming a diffusion barrier layer at least over the sidewalls of the trench; forming encapsulation material over the plurality of chips and in the trench; and singularizing the plurality of chips from a side opposite the encapsulation material.
Abstract translation: 提供了一种用于处理包括多个芯片的晶片的方法。 该方法可以包括:在晶片之间的多个芯片之间形成沟槽; 至少在所述沟槽的侧壁上形成扩散阻挡层; 在所述多个芯片和所述沟槽中形成封装材料; 并且从与封装材料相对的一侧将多个芯片单数化。
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3.
公开(公告)号:US20140117511A1
公开(公告)日:2014-05-01
申请号:US13664311
申请日:2012-10-30
Applicant: INFINEON TECHNOLOGIES AG
Inventor: Kurt Matoy , Hubert Maier , Christian Krenn , Elfriede Kraxner Wellenzohn , Helmut Schoenherr , Juergen Steinbrenner , Markus Kahn , Fister Schlemitz Silvana , Christoph Brunner , Herbert Gietler , Uwe Hoeckele
CPC classification number: H01L23/3171 , H01L21/0206 , H01L21/0214 , H01L21/02164 , H01L21/022 , H01L21/02274 , H01L21/02334 , H01L21/0234 , H01L21/76801 , H01L23/291
Abstract: A passivation layer and a method of making a passivation layer are disclosed. In one embodiment the method for manufacturing a passivation layer includes depositing a first silicon based dielectric layer on a workpiece, the first silicon based dielectric layer comprising nitrogen, and depositing in-situ a second silicon based dielectric layer on the first silicon based dielectric layer, the second dielectric layer comprising oxygen.
Abstract translation: 公开了钝化层和制备钝化层的方法。 在一个实施例中,制造钝化层的方法包括在工件上沉积第一硅基电介质层,第一硅基电介质层包含氮,并在第一硅基电介质层上原位沉积第二硅基电介质层, 所述第二电介质层包含氧。
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公开(公告)号:US09728480B2
公开(公告)日:2017-08-08
申请号:US14699704
申请日:2015-04-29
Applicant: Infineon Technologies AG
Inventor: Kurt Matoy , Hubert Maier , Christian Krenn , Elfriede Kraxner Wellenzohn , Helmut Schoenherr , Juergen Steinbrenner , Markus Kahn , Silvana Fister , Christoph Brunner , Herbert Gietler , Uwe Hoeckele
IPC: H01L21/3105 , H01L23/31 , H01L21/02 , H01L23/29
CPC classification number: H01L23/3171 , H01L21/0206 , H01L21/0214 , H01L21/02164 , H01L21/022 , H01L21/02274 , H01L21/02334 , H01L21/0234 , H01L21/76801 , H01L23/291
Abstract: A passivation layer and a method of making a passivation layer are disclosed. In one embodiment the method for manufacturing a passivation layer includes depositing a first silicon based dielectric layer on a workpiece, the first silicon based dielectric layer comprising nitrogen, and depositing in-situ a second silicon based dielectric layer on the first silicon based dielectric layer, the second dielectric layer comprising oxygen.
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公开(公告)号:US20150064879A1
公开(公告)日:2015-03-05
申请号:US14013822
申请日:2013-08-29
Applicant: Infineon Technologies AG
Inventor: Manfred Engelhardt , Gudrun Stranzl , Markus Zundel , Hubert Maier
CPC classification number: H01J37/32009 , B28D5/00 , H01J2237/334 , H01L21/6835 , H01L21/6836 , H01L21/78 , H01L2221/68327 , H01L2221/68336 , H01L2221/6834
Abstract: Various methods and apparatuses are provided relating to separation of a substrate into a plurality of parts. For example, first a partial separation is performed and then the partially separated substrate is completely separated into a plurality of parts.
Abstract translation: 提供了关于将基板分离成多个部件的各种方法和装置。 例如,首先进行部分分离,然后将部分分离的基板完全分离成多个部分。
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公开(公告)号:US09490103B2
公开(公告)日:2016-11-08
申请号:US14977625
申请日:2015-12-21
Applicant: Infineon Technologies AG
Inventor: Manfred Engelhardt , Gudrun Stranzl , Markus Zundel , Hubert Maier
IPC: H01L21/683 , H01L21/78 , H01J37/32 , B28D5/00
CPC classification number: H01J37/32009 , B28D5/00 , H01J2237/334 , H01L21/6835 , H01L21/6836 , H01L21/78 , H01L2221/68327 , H01L2221/68336 , H01L2221/6834
Abstract: Various methods and apparatuses are provided relating to separation of a substrate into a plurality of parts. For example, first a partial separation is performed and then the partially separated substrate is completely separated into a plurality of parts.
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公开(公告)号:US09490173B2
公开(公告)日:2016-11-08
申请号:US14066777
申请日:2013-10-30
Applicant: Infineon Technologies AG
Inventor: Hubert Maier
IPC: H01L21/00 , H01L21/82 , H01L21/306 , H01L21/768 , H01L23/31 , H01L21/78 , H01L21/56
CPC classification number: H01L21/82 , H01L21/306 , H01L21/561 , H01L21/7685 , H01L21/78 , H01L23/3114 , H01L23/3157 , H01L23/3185 , H01L2924/0002 , H01L2924/00
Abstract: A method for processing a wafer including a plurality of chips is provided. The method may include: forming a trench in the wafer between the plurality of chips; forming a diffusion barrier layer at least over the sidewalls of the trench; forming encapsulation material over the plurality of chips and in the trench; and singularizing the plurality of chips from a side opposite the encapsulation material.
Abstract translation: 提供了一种用于处理包括多个芯片的晶片的方法。 该方法可以包括:在晶片之间的多个芯片之间形成沟槽; 至少在所述沟槽的侧壁上形成扩散阻挡层; 在所述多个芯片和所述沟槽中形成封装材料; 并且从与封装材料相对的一侧将多个芯片单数化。
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公开(公告)号:US09219011B2
公开(公告)日:2015-12-22
申请号:US14013822
申请日:2013-08-29
Applicant: Infineon Technologies AG
Inventor: Manfred Engelhardt , Gudrun Stranzl , Markus Zundel , Hubert Maier
CPC classification number: H01J37/32009 , B28D5/00 , H01J2237/334 , H01L21/6835 , H01L21/6836 , H01L21/78 , H01L2221/68327 , H01L2221/68336 , H01L2221/6834
Abstract: Various methods and apparatuses are provided relating to separation of a substrate into a plurality of parts. For example, first a partial separation is performed and then the partially separated substrate is completely separated into a plurality of parts.
Abstract translation: 提供了关于将基板分离成多个部件的各种方法和装置。 例如,首先进行部分分离,然后将部分分离的基板完全分离成多个部分。
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9.
公开(公告)号:US20150235917A1
公开(公告)日:2015-08-20
申请号:US14699704
申请日:2015-04-29
Applicant: INFINEON TECHNOLOGIES AG
Inventor: Kurt Matoy , Hubert Maier , Christian Krenn , Elfriede Kraxner Wellenzohn , Helmut Schoenherr , Juergen Steinbrenner , Markus Kahn , Silvana Fister , Christoph Brunner , Herbert Gietler , Uwe Hoeckele
CPC classification number: H01L23/3171 , H01L21/0206 , H01L21/0214 , H01L21/02164 , H01L21/022 , H01L21/02274 , H01L21/02334 , H01L21/0234 , H01L21/76801 , H01L23/291
Abstract: A passivation layer and a method of making a passivation layer are disclosed. In one embodiment the method for manufacturing a passivation layer includes depositing a first silicon based dielectric layer on a workpiece, the first silicon based dielectric layer comprising nitrogen, and depositing in-situ a second silicon based dielectric layer on the first silicon based dielectric layer, the second dielectric layer comprising oxygen.
Abstract translation: 公开了钝化层和制备钝化层的方法。 在一个实施例中,制造钝化层的方法包括在工件上沉积第一硅基电介质层,第一硅基电介质层包含氮,并在第一硅基电介质层上原位沉积第二硅基电介质层, 所述第二电介质层包含氧。
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