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    Low power buffer with dynamic gain control
    1.
    发明授权
    Low power buffer with dynamic gain control 有权
    具有动态增益控制功能的低功耗缓冲器

    公开(公告)号：US09553569B1

    公开(公告)日：2017-01-24

    申请号：US14614253

    申请日：2015-02-04

    Applicant: INPHI CORPORATION

    Inventor： James Lawrence Gorecki ,  Han-Yuan Tan

    IPC: H03K5/02 ,  H03K5/01 ,  H03F3/30

    CPC classification number: H03K5/023 ,  H03F3/3001 ,  H03F3/3033 ,  H03F3/45076 ,  H03F3/45179 ,  H03F3/68 ,  H03G3/20 ,  H03K3/012 ,  H03K5/01 ,  H03K5/02 ,  H03M1/1245 ,  H03M1/38 ,  H03M1/66 ,  H04B1/16

    Abstract: The present disclosure provides a detailed description of techniques for implementing a low power buffer with dynamic gain control. More specifically, some embodiments of the present disclosure are directed to a buffer having a gain boost configuration and a current shunt circuit to control the gain of a respective gain boosting transistor of the gain boost configuration. The current shunt circuit and resulting gain are dynamically controlled by a gain control signal such that the buffer gain can be adjusted to within an acceptable range of the target gain for the current operating and device mismatch conditions. In one or more embodiments, the gain boost configuration with dynamic gain control can be deployed in a full differential implementation. Both analog and digital dynamic calibration and control techniques can be used to provide the gain control signals to multiple current shunt circuits and multiple buffers.

    Abstract translation: 本公开提供了用于实现具有动态增益控制的低功率缓冲器的技术的详细描述。 更具体地，本公开的一些实施例涉及具有增益升压配置的缓冲器和用于控制增益升压配置的相应增益升压晶体管的增益的电流分流电路。 电流分流电路和所得增益由增益控制信号动态地控制，使得缓冲器增益可以被调整到当前操作和器件失配条件下目标增益的可接受范围内。 在一个或多个实施例中，具有动态增益控制的增益升压配置可以部署在全差分实现中。 模拟和数字动态校准和控制技术都可用于向多个电流分流电路和多个缓冲器提供增益控制信号。

    Low power buffer with gain boost
    3.
    发明授权
    Low power buffer with gain boost 有权

    公开(公告)号：US09647643B2

    公开(公告)日：2017-05-09

    申请号：US15231449

    申请日：2016-08-08

    Applicant: INPHI CORPORATION

    Inventor： James Lawrence Gorecki ,  Han-Yuan Tan

    IPC: H03K3/012 ,  H03K5/02 ,  G11C27/02 ,  H03F1/32 ,  H03F3/45 ,  H03M1/12 ,  H03M3/00

    CPC classification number: H03K5/023 ,  G11C27/026 ,  H03F1/3205 ,  H03F1/3211 ,  H03F3/45183 ,  H03F3/45475 ,  H03G3/20 ,  H03K3/012 ,  H03M1/1215 ,  H03M1/124 ,  H03M3/38 ,  H04B17/21

    Abstract: The present disclosure provides a detailed description of techniques for implementing a low power buffer with gain boost. More specifically, some embodiments of the present disclosure are directed to a buffer with a stacked transistor configuration, wherein the first transistor receives an input signal and the second transistor receives a complement of the input signal. The first transistor is configured to generate a non-inverting response to the input signal, and the second transistor is configured to generate an inverting response to the complement of the input signal, and to generate a negative gds effect, enabling the buffer to exhibit low power and unity gain across a wide bandwidth. In other embodiments, the stacked transistor configuration can be deployed in a full differential implementation. In other embodiments, the buffer can include techniques for improving linearity, DC level shifts, capacitive input loading, and output slewing, settling, and drive capabilities.

    Trans-impedance amplifier with replica gain control
    4.
    发明授权
    Trans-impedance amplifier with replica gain control 有权
    具有复制增益控制的跨阻放大器

    公开(公告)号：US09473090B2

    公开(公告)日：2016-10-18

    申请号：US14550842

    申请日：2014-11-21

    Applicant: INPHI CORPORATION

    Inventor： James Lawrence Gorecki ,  Irene Quek

    IPC: H03F3/08 ,  H03F3/45 ,  H03G3/30 ,  H03G1/00 ,  H03F1/08 ,  H03F3/30

    CPC classification number: H03G3/3084 ,  H03F1/086 ,  H03F3/082 ,  H03F3/3028 ,  H03F3/45076 ,  H03F3/45179 ,  H03F2200/453 ,  H03F2203/30084 ,  H03F2203/30117 ,  H03F2203/45224 ,  H03F2203/45288 ,  H03G1/0035 ,  H04B10/2507 ,  H04B10/6911

    Abstract: This disclosure relates to the field of amplifiers for multi-level optical communication and more particularly to techniques for trans-impedance amplifiers (TIA) with gain control. The claimed embodiments address the problem of implementing a low cost TIA that exhibits high linearity, low noise, low power, and wide bandwidth. More specifically, some claims are directed to approaches for providing TIA gain control using a plurality of inverter-based replica gain control cells controlled by a feedback loop to manage the current into the amplifying output stage and thereby the TIA output voltage.

    Abstract translation: 本公开涉及用于多级光通信的放大器领域，更具体地涉及具有增益控制的跨阻抗放大器（TIA）的技术。 所要求保护的实施例解决了实现具有高线性度，低噪声，低功率和宽带宽的低成本TIA的问题。 更具体地，一些权利要求涉及用于使用由反馈环路控制的多个基于逆变器的复制增益控制单元来提供TIA增益控制的方法，以管理进入放大输出级的电流，从而管理TIA输出电压。

    Low power buffer with dynamic gain control
    5.
    发明授权
    Low power buffer with dynamic gain control 有权

    公开(公告)号：US10103717B2

    公开(公告)日：2018-10-16

    申请号：US15800848

    申请日：2017-11-01

    Applicant: INPHI CORPORATION

    Inventor： James Lawrence Gorecki ,  Han-Yuan Tan

    IPC: H04B1/16 ,  H03K5/02 ,  H03K5/01 ,  H03F3/30 ,  H03F3/45 ,  H03F3/68 ,  H03G3/20 ,  H03K3/012 ,  H03M1/12 ,  H03M1/38 ,  H03M1/66

    Abstract: The present disclosure provides a detailed description of techniques for implementing a low power buffer with dynamic gain control. More specifically, some embodiments of the present disclosure are directed to a buffer having a gain boost configuration and a current shunt circuit to control the gain of a respective gain boosting transistor of the gain boost configuration. The current shunt circuit and resulting gain are dynamically controlled by a gain control signal such that the buffer gain can be adjusted to within an acceptable range of the target gain for the current operating and device mismatch conditions. In one or more embodiments, the gain boost configuration with dynamic gain control can be deployed in a full differential implementation. Both analog and digital dynamic calibration and control techniques can be used to provide the gain control signals to multiple current shunt circuits and multiple buffers.

    Low power buffer with gain boost
    6.
    发明授权
    Low power buffer with gain boost 有权
    低功耗缓冲器，增益提升

    公开(公告)号：US09432000B1

    公开(公告)日：2016-08-30

    申请号：US14614257

    申请日：2015-02-04

    Applicant: INPHI CORPORATION

    Inventor： James Lawrence Gorecki ,  Han-Yuan Tan

    IPC: H03K3/012 ,  H03K5/02

    CPC classification number: H03K5/023 ,  G11C27/026 ,  H03F1/3205 ,  H03F1/3211 ,  H03F3/45183 ,  H03F3/45475 ,  H03G3/20 ,  H03K3/012 ,  H03M1/1215 ,  H03M1/124 ,  H03M3/38 ,  H04B17/21

    Abstract: The present disclosure provides a detailed description of techniques for implementing a low power buffer with gain boost. More specifically, some embodiments of the present disclosure are directed to a buffer with a stacked transistor configuration, wherein the first transistor receives an input signal and the second transistor receives a complement of the input signal. The first transistor is configured to generate a non-inverting response to the input signal, and the second transistor is configured to generate an inverting response to the complement of the input signal, and to generate a negative gds effect, enabling the buffer to exhibit low power and unity gain across a wide bandwidth. In other embodiments, the stacked transistor configuration can be deployed in a full differential implementation. In other embodiments, the buffer can include techniques for improving linearity, DC level shifts, capacitive input loading, and output slewing, settling, and drive capabilities.

    Abstract translation: 本公开提供了用于实现具有增益提升的低功率缓冲器的技术的详细描述。 更具体地，本公开的一些实施例涉及具有堆叠晶体管配置的缓冲器，其中第一晶体管接收输入信号，并且第二晶体管接收输入信号的补码。 第一晶体管被配置为产生对输入信号的非反相响应，并且第二晶体管被配置为产生对输入信号的补码的反相响应，并且产生负gds效应，使缓冲器显示为低 功率和单位增益在宽带宽。 在其他实施例中，堆叠晶体管配置可以部署在完全不同的实现中。 在其他实施例中，缓冲器可以包括用于改善线性度，DC电平偏移，电容性输入负载以及输出回转，稳定和驱动能力的技术。

    Low power buffer with gain boost
    7.
    发明授权
    Low power buffer with gain boost 有权

    公开(公告)号：US10110204B2

    公开(公告)日：2018-10-23

    申请号：US15476645

    申请日：2017-03-31

    Applicant: INPHI CORPORATION

    Inventor： James Lawrence Gorecki ,  Han-Yuan Tan

    IPC: H03K3/012 ,  H03K5/02 ,  G11C27/02 ,  H03M3/00 ,  H03F1/32 ,  H03F3/45 ,  H04B17/21 ,  H03G3/20 ,  H03M1/12

    Abstract: The present disclosure provides a detailed description of techniques for implementing a low power buffer with gain boost. More specifically, some embodiments of the present disclosure are directed to a buffer with a stacked transistor configuration, wherein the first transistor receives an input signal and the second transistor receives a complement of the input signal. The first transistor is configured to generate a non-inverting response to the input signal, and the second transistor is configured to generate an inverting response to the complement of the input signal, and to generate a negative gds effect, enabling the buffer to exhibit low power and unity gain across a wide bandwidth. In other embodiments, the stacked transistor configuration can be deployed in a full differential implementation. In other embodiments, the buffer can include techniques for improving linearity, DC level shifts, capacitive input loading, and output slewing, settling, and drive capabilities.

    Wideband low dropout voltage regulator with power supply rejection boost
    8.
    发明授权
    Wideband low dropout voltage regulator with power supply rejection boost 有权

    公开(公告)号：US09921593B2

    公开(公告)日：2018-03-20

    申请号：US15374983

    申请日：2016-12-09

    Applicant: INPHI CORPORATION

    Inventor： James Lawrence Gorecki ,  Han-Yuan Tan

    IPC: G05F1/565 ,  G05F1/575

    CPC classification number: G05F1/565 ,  G05F1/575

    Abstract: The present disclosure provides a detailed description of techniques for implementing a wideband low dropout voltage regulator with power supply rejection boost. More specifically, some embodiments of the present disclosure are directed to a voltage regulator comprising a voltage regulator core powered by a supply voltage and providing a regulated voltage output, and a power supply feed forward injection module delivering an injection signal to the voltage regulator core to effect a power supply rejection of the supply voltage variation from the regulated voltage. In one or more embodiments, the injection signal is determined from the supply voltage variation and a gain factor that is based on various design attributes of the output stage of the voltage regulator core. In one or more embodiments, the power supply feed forward injection module comprises a supply voltage sense circuit, a low pass filter, and one or more selectable transconductance amplifiers.

    Wideband low dropout voltage regulator with power supply rejection boost
    10.
    发明授权
    Wideband low dropout voltage regulator with power supply rejection boost 有权
    宽带低压差稳压器，具有电源抑制提升功能

    公开(公告)号：US09552006B1

    公开(公告)日：2017-01-24

    申请号：US14642647

    申请日：2015-03-09

    Applicant: INPHI CORPORATION

    Inventor： James Lawrence Gorecki ,  Han-Yuan Tan

    IPC: G05F1/565 ,  G05F1/575

    CPC classification number: G05F1/565 ,  G05F1/575

    Abstract: The present disclosure provides a detailed description of techniques for implementing a wideband low dropout voltage regulator with power supply rejection boost. More specifically, some embodiments of the present disclosure are directed to a voltage regulator comprising a voltage regulator core powered by a supply voltage and providing a regulated voltage output, and a power supply feed forward injection module delivering an injection signal to the voltage regulator core to effect a power supply rejection of the supply voltage variation from the regulated voltage. In one or more embodiments, the injection signal is determined from the supply voltage variation and a gain factor that is based on various design attributes of the output stage of the voltage regulator core. In one or more embodiments, the power supply feed forward injection module comprises a supply voltage sense circuit, a low pass filter, and one or more selectable transconductance amplifiers.

    Abstract translation: 本公开提供了用于实现具有电源抑制提升的宽带低压差稳压器的技术的详细描述。 更具体地，本公开的一些实施例涉及一种电压调节器，其包括由供电电压供电并提供调节电压输出的电压调节器核心，以及电源前馈注入模块，其将注入信号传递到电压调节器芯到 影响电源电压与调节电压的偏差。 在一个或多个实施例中，根据电源电压变化和基于电压调节器芯的输出级的各种设计属性的增益因子来确定注入信号。 在一个或多个实施例中，电源前馈模块包括电源电压检测电路，低通滤波器和一个或多个可选择的跨导放大器。

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