-
1.
公开(公告)号:US20200125579A1
公开(公告)日:2020-04-23
申请号:US16426029
申请日:2019-05-30
Applicant: Intel Corporation
Inventor: Sagar C. Pawar , Prakash Pillai , Raghavendra N , Aneesh A. Tuljapurkar
Abstract: Technologies for synchronized overclocking setting between multiple networked computing devices include a master computing device and multiple slave computing devices communicating over a network. The master computing device establishes a connection with the slave computing devices. Establishing the connection may include synchronizing the slave computing devices with a master time clock of the master computing device. The master computing device determines its own overclocking setting and requests overlocking settings from the slave computing devices. The overclocking settings may include processor frequency, processor voltage, or other overclocking parameters. The master computing device determines a best overclocking setting from its own overclocking setting and the overclocking settings received from the slave computing device. The master computing device advertises the best overclocking setting to the slave computing devices. The slave computing devices may implement the best overclocking setting. Other embodiments are described and claimed.
-
公开(公告)号:US20200225994A1
公开(公告)日:2020-07-16
申请号:US16832372
申请日:2020-03-27
Applicant: Intel Corporation
Inventor: Pannerkumar Rajagopal , Murali R. Iyengar , Karunakara Kotary , Ovais Pir , Sagar C. Pawar , Prakash Pillai , Raghavendra N. , Aneesh A. Tuljapurkar
IPC: G06F9/50 , G06F9/4401 , G06F9/54 , G06F12/1009 , G06T1/60
Abstract: Described is a system where memory can be allocated for use by an adapter pre-boot and preserved for use post-boot. A BIOS can allocate for pre-boot hardware operations (e.g., graphics drivers, framebuffers, etc.) and mark this allocated memory as preserved. An indication of the allocated memory can be provided for an OS, such that post-boot, the OS can reclaim and reallocate this memory.
-
3.
公开(公告)号:US20180278075A1
公开(公告)日:2018-09-27
申请号:US15467874
申请日:2017-03-23
Applicant: Intel Corporation
Inventor: Sagar C. Pawar , Anantha Narayanan , Ravindra A. Babu , Aneesh A. Tuljapurkar
IPC: H02J7/00
CPC classification number: H02J7/0068 , G06F1/266 , G06F1/3212 , H02J7/0047 , H02J7/0054 , H02J7/027 , H02J2007/005 , H02J2007/0062 , H02J2007/0096
Abstract: An apparatus system is provided which comprises: a first input/output (I/O) port; a second I/O port; circuitry to generate (i) a first signal at a first voltage level and (ii) a second signal at a second voltage level; and switching circuitry to selectively supply any one of the first signal or the second signal to any one of the first I/O port or the second I/O port.
-
4.
公开(公告)号:US10747779B2
公开(公告)日:2020-08-18
申请号:US16426029
申请日:2019-05-30
Applicant: Intel Corporation
Inventor: Sagar C. Pawar , Prakash Pillai , Raghavendra N , Aneesh A. Tuljapurkar
Abstract: Technologies for synchronized overclocking setting between multiple networked computing devices include a master computing device and multiple slave computing devices communicating over a network. The master computing device establishes a connection with the slave computing devices. Establishing the connection may include synchronizing the slave computing devices with a master time clock of the master computing device. The master computing device determines its own overclocking setting and requests overclocking settings from the slave computing devices. The overclocking settings may include processor frequency, processor voltage, or other overclocking parameters. The master computing device determines a best overclocking setting from its own overclocking setting and the overclocking settings received from the slave computing device. The master computing device advertises the best overclocking setting to the slave computing devices. The slave computing devices may implement the best overclocking setting. Other embodiments are described and claimed.
-
5.
公开(公告)号:US10318547B2
公开(公告)日:2019-06-11
申请号:US15481733
申请日:2017-04-07
Applicant: INTEL CORPORATION
Inventor: Sagar C. Pawar , Prakash Pillai , Raghavendra N , Aneesh A. Tuljapurkar
Abstract: Technologies for synchronized overclocking setting between multiple networked computing devices include a master computing device and multiple slave computing devices communicating over a network. The master computing device establishes a connection with the slave computing devices. Establishing the connection may include synchronizing the slave computing devices with a master time clock of the master computing device. The master computing device determines its own overclocking setting and requests overclocking settings from the slave computing devices. The overclocking settings may include processor frequency, processor voltage, or other overclocking parameters. The master computing device determines a best overclocking setting from its own overclocking setting and the overclocking settings received from the slave computing device. The master computing device advertises the best overclocking setting to the slave computing devices. The slave computing devices may implement the best overclocking setting. Other embodiments are described and claimed.
-
6.
公开(公告)号:US20180275738A1
公开(公告)日:2018-09-27
申请号:US15467844
申请日:2017-03-23
Applicant: Intel Corporation
Inventor: Sagar C. Pawar , Anantha Narayanan , Ravindra A. Babu , Aneesh A. Tuljapurkar
CPC classification number: G06F1/3287 , G06F1/266 , G06F1/325 , G06F13/385 , G06F13/4022 , G06F13/4282
Abstract: An apparatus system is provided which comprises: a port to selectively receive a device external to the apparatus; a port control circuitry to selectively supply power to the port; and a controller to selectively turn on or turn off the port.
-
7.
公开(公告)号:US10447052B2
公开(公告)日:2019-10-15
申请号:US15467874
申请日:2017-03-23
Applicant: Intel Corporation
Inventor: Sagar C. Pawar , Anantha Narayanan , Ravindra A. Babu , Aneesh A. Tuljapurkar
IPC: H02J7/00 , H02J7/02 , G06F1/26 , G06F1/3212
Abstract: An apparatus system is provided which comprises: a first input/output (I/O) port; a second I/O port; circuitry to generate (i) a first signal at a first voltage level and (ii) a second signal at a second voltage level; and switching circuitry to selectively supply any one of the first signal or the second signal to any one of the first I/O port or the second I/O port.
-
8.
公开(公告)号:US10331200B2
公开(公告)日:2019-06-25
申请号:US15467844
申请日:2017-03-23
Applicant: Intel Corporation
Inventor: Sagar C. Pawar , Anantha Narayanan , Ravindra A. Babu , Aneesh A. Tuljapurkar
IPC: G06F13/00 , G06F1/3287 , G06F13/42 , G06F13/40 , G06F13/38 , G06F1/26 , G06F1/3234
Abstract: An apparatus system is provided which comprises: a port to selectively receive a device external to the apparatus; a port control circuitry to selectively supply power to the port; and a controller to selectively turn on or turn off the port.
-
9.
公开(公告)号:US20180293291A1
公开(公告)日:2018-10-11
申请号:US15481733
申请日:2017-04-07
Applicant: INTEL CORPORATION
Inventor: Sagar C. Pawar , Prakash Pillai , Raghavendra N , Aneesh A. Tuljapurkar
CPC classification number: G06F17/30575 , G06F1/04 , H04J3/06 , H04L7/0008 , H04L7/0016 , H04L7/10
Abstract: Technologies for synchronized overclocking setting between multiple networked computing devices include a master computing device and multiple slave computing devices communicating over a network. The master computing device establishes a connection with the slave computing devices. Establishing the connection may include synchronizing the slave computing devices with a master time clock of the master computing device. The master computing device determines its own overclocking setting and requests overclocking settings from the slave computing devices. The overclocking settings may include processor frequency, processor voltage, or other overclocking parameters. The master computing device determines a best overclocking setting from its own overclocking setting and the overclocking settings received from the slave computing device. The master computing device advertises the best overclocking setting to the slave computing devices. The slave computing devices may implement the best overclocking setting. Other embodiments are described and claimed.
-
-
-
-
-
-
-
-