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公开(公告)号:US20200229294A1
公开(公告)日:2020-07-16
申请号:US16249499
申请日:2019-01-16
Applicant: Intel Corporation
Inventor: Jonathan W. THIBADO , Jeffory L. SMALLEY , John C. GULICK , Phi THANH
Abstract: Embodiments include a reflowable grid array (RGA) interposer, a semiconductor packaged system, and a method of forming the semiconductor packaged system. The RGA interposer includes a substrate having vias and zones, where the zones have embedded heaters. The heaters may include first traces, second traces, and via filament interconnects. The vias may have a z-height greater than a z-height of the heaters, and each of the zones may have a grid pattern. The RGA interposer may include first and second layers in the substrate, where the first layer includes the first traces, the second layer includes the second traces, and the second layer is over the first layer. The grid pattern may have parallel first traces orthogonal to parallel second traces to form a pattern of squares, where the pattern of squares has the first traces intersect the second traces substantially at right angles.
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公开(公告)号:US20220208645A1
公开(公告)日:2022-06-30
申请号:US17696694
申请日:2022-03-16
Applicant: Intel Corporation
Inventor: Olaotan ELENITOBA-JOHNSON , Eric ERIKE , Jeffory L. SMALLEY , Ulises ENCARNACION , Ralph V. MIELE , Phil GENG , Sri Priyanka TUNUGUNTLA , Shaun G. IMMEKER
IPC: H01L23/40
Abstract: An apparatus is described. The apparatus includes a back plate. The apparatus includes a bolster plate that is secured to the back plate with a back bolt. The bolster plate has a window. The apparatus includes a circuit board between the back plate and the bolster plate. A semiconductor chip package is electro-mechanically coupled to the circuit board within the window. The apparatus includes a load stud that emanates from a face of the bolster plate. The back bolt emanates from an opposite face of the bolster plate. The load stud and back bolt are oriented along a same axis that is orthogonal to the face and the opposite face. The apparatus includes a heat sink. The apparatus includes a loading plate. The heat sink is mounted to the loading plate. The loading plate has a fixturing element that is secured to the load stud to secure the loading plate to the bolster plate.
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公开(公告)号:US20200229309A1
公开(公告)日:2020-07-16
申请号:US16249512
申请日:2019-01-16
Applicant: Intel Corporation
Inventor: Jonathan W. THIBADO , Jeffory L. SMALLEY , John C. GULICK , Phi THANH
Abstract: Embodiments include a reflowable grid array (RGA) interposer, a semiconductor packaged system, and a method of forming the semiconductor packaged system. The RGA interposer includes a plurality of heater traces in a substrate. The RGA interposer also includes a plurality of vias in the substrate. The vias extend vertically from the bottom surface to the top surface of the substrate. The RGA interposer may have one of the vias between two of the heater traces, wherein the vias have a z-height that is greater than a z-height of the heater traces. The heater traces may be embedded in a layer of the substrate, where the layer of the substrate is between top ends and bottom ends of the vias. Each of the plurality of heater traces may include a via filament interconnect coupled to a power source and a ground source. The heater traces may be resistive heaters.
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公开(公告)号:US20220174843A1
公开(公告)日:2022-06-02
申请号:US17676100
申请日:2022-02-18
Applicant: Intel Corporation
Inventor: Phil GENG , Ralph V. MIELE , David SHIA , Sandeep AHUJA , Jeffory L. SMALLEY
Abstract: An apparatus is described. The apparatus includes a bolster plate having a first fixturing element and a strap. The strap is positioned along a frame arm of the bolster plate. The strap has a second fixturing element to be fixed to a cooling mass. The strap is to diminish movement of the cooling mass along the frame arm's dimension and a dimension that is orthogonal to the frame arm's dimension. A semiconductor chip package is to be placed in a window opening formed by the bolster plate's frame arms. The cooling mass is to be thermally coupled to the semiconductor chip package.
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公开(公告)号:US20210378099A1
公开(公告)日:2021-12-02
申请号:US17381092
申请日:2021-07-20
Applicant: Intel Corporation
Inventor: Phil GENG , Timothy Glen HANNA , Xiaoning YE , Sandeep AHUJA , Jacob MCMILLIAN , Ralph V. MIELE , David SHIA , Jeffory L. SMALLEY
IPC: H05K1/18 , H01L23/367 , H01L23/40 , H05K1/02
Abstract: An apparatus is described. The apparatus includes a semiconductor chip package loading assembly having a heat sink and a first magnetic material, the first magnetic material to be mechanically coupled to a first side of a printed circuit board that is opposite a second side of the printed circuit board where input/outputs (I/Os) of the semiconductor chip package interface with the printed circuit board. The first magnetic material to be positioned between the printed circuit board and a second magnetic material. The first magnetic material is to be magnetically attracted to the second magnetic material to impede movement of the heat sink.
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公开(公告)号:US20190067158A1
公开(公告)日:2019-02-28
申请号:US16175712
申请日:2018-10-30
Applicant: Intel Corporation
Inventor: Jeffory L. SMALLEY , Susan F. SMITH , Mani PRAKASH , Tao LIU , Henry C. BOSAK , Harvey R. KOFSTAD , Almanzo T. ORTIZ
IPC: H01L23/367 , H01L23/433 , H01L25/065 , H01L23/40
Abstract: An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first passive heat exchanger disposed on the primary device and having an opening over an area corresponding to the at least one secondary device; a second passive heat exchanger disposed on the at least one secondary device; at least one first spring operable to apply a force to the first heat exchanger in a direction of the primary device; and at least one second spring operable to apply a force to the second heat exchanger in the direction of the secondary device. A method including placing a passive heat exchanger on a multi-chip package, and deflecting a spring to apply a force in a direction of an at least one secondary device on the package.
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公开(公告)号:US20220117079A1
公开(公告)日:2022-04-14
申请号:US17555250
申请日:2021-12-17
Applicant: Intel Corporation
Inventor: Phil GENG , Jeffory L. SMALLEY , Sandeep AHUJA , Ralph V. MIELE , David SHIA
Abstract: An apparatus is described. The apparatus includes a semiconductor chip package assembly having a spring element to be coupled between a first mechanical element and a second mechanical element to apply a loading force that pulls the first and second mechanical elements toward each other in the assembly's nominal assembled state. The first and second elements to support a cooling mass, the assembly further comprising a dampener that is coupled to at least one of the first and second mechanical elements to reduce oscillation amplitude of the cooling mass.
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公开(公告)号:US20210183737A1
公开(公告)日:2021-06-17
申请号:US17132391
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Jeffory L. SMALLEY , Mohanraj PRABHUGOUD , Steven A. KLEIN , Mengqi LIU
IPC: H01L23/40 , H01L23/495
Abstract: An apparatus is described. The apparatus includes a loading frame for mounting a packaged semiconductor chip and a heat sink for the packaged semiconductor chip to a socket. The loading frame is comprised of metal. The loading frame has at least one frame leg where the metal is folded to re-enforce a strength of the frame leg.
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公开(公告)号:US20200227362A1
公开(公告)日:2020-07-16
申请号:US16247312
申请日:2019-01-14
Applicant: Intel Corporation
Inventor: Jonathan W. THIBADO , Jeffory L. SMALLEY , John C. GULICK , Phi THANH , Mohanraj PRABHUGOUD , Chong ZHAO
IPC: H01L23/66 , H05K1/18 , H01L23/498 , H01L23/34 , H01B7/04 , G02B6/42 , H01B3/30 , H01B7/08 , H01L25/10 , H05K1/02
Abstract: Embodiments include interposers for use in high speed applications. In an embodiment, the interposer comprises an interposer substrate, and an array of pads on a first surface of the interposer substrate. In an embodiment, a plurality of vias pass through the interposer substrate, where each via is electrically coupled to one of the pads in the array of pads. In an embodiment a plurality of heating elements are embedded in the interposer substrate. In an embodiment a first cable is over the first surface interposer substrate. In an embodiment, the first cable comprises an array of conductive lines along the first cable, where conductive lines proximate to a first end of the cable are electrically coupled to pads in the array of pads.
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公开(公告)号:US20160276243A1
公开(公告)日:2016-09-22
申请号:US14767843
申请日:2014-09-27
Applicant: INTEL CORPORATION
Inventor: Jeffory L. SMALLEY , Susan F. SMITH , Mani PRAKASH , Tao LIU , Henry C. BOSAK , Almanzo T. ORTIZ
IPC: H01L23/367 , H01L25/065 , H01L23/433
CPC classification number: H01L23/3677 , H01L23/3675 , H01L23/4093 , H01L23/4338 , H01L25/0655 , H01L2924/0002 , H01L2924/00
Abstract: An apparatus including a primary device and at least one secondary device coupled in a planar array to a substrate; a first passive heat exchanger disposed on the primary device and having an opening over an area corresponding to the at least one secondary device; a second passive heat exchanger disposed on the at least one secondary device; at least one first spring operable to apply a force to the first heat exchanger in a direction of the primary device; and at least one second spring operable to apply a force to the second heat exchanger in the direction of the secondary device. A method including placing a passive heat exchanger on a multi-chip package, and deflecting a spring to apply a force in a direction of an at least one secondary device on the package.
Abstract translation: 一种装置,包括主要装置和至少一个辅助装置,其以平面阵列耦合到基板; 第一被动式热交换器,其设置在所述主装置上并且在对应于所述至少一个次级装置的区域上具有开口; 设置在所述至少一个次级装置上的第二被动热交换器; 至少一个第一弹簧,其可操作以在所述主装置的方向上向所述第一热交换器施加力; 以及至少一个第二弹簧,其可操作以在所述次级装置的方向上向所述第二热交换器施加力。 一种方法,包括将被动热交换器放置在多芯片封装上,以及使弹簧偏转以在所述封装上的至少一个次级装置的方向施加力。
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