公开(公告)号：US12250636B2

公开(公告)日：2025-03-11

申请号：US17520768

申请日：2021-11-08

Applicant: Intel Corporation

Inventor： Shailendra Singh Chauhan ,  Santhosh Ap ,  Arunthathi Chandrabose ,  Mythili Hegde

IPC: H04W52/02 ,  G06F1/26 ,  H04B7/0413 ,  H04W84/12

Abstract: A battery-powered device includes a baseband modem, configured to receive or send data according to a first operational mode, wherein the data correspond to a software application being executed on the battery-powered device; and a processor, configured to determine a resource requirement of the software application; and send a signal representing the determined resource requirement to the baseband modem; wherein the baseband modem is further configured to change from the first operational mode to a second operational mode based on the signal.

公开(公告)号：US20240104043A1

公开(公告)日：2024-03-28

申请号：US17950840

申请日：2022-09-22

Applicant: Intel Corporation

Inventor： Shailendra Singh Chauhan ,  Nirmala Bailur ,  Reza M. Zamani ,  Jackson Chung Peng Kong ,  Charuhasini Sunder Raman ,  Venkataramani Gopalakrishnan ,  Chuen Ming Tan ,  Sreejith Satheesakurup ,  Karthi Kaliswamy ,  Venkata Mahesh Gunnam ,  Yi Jen Huang ,  Kie Woon Lim ,  Dhinesh Sasidaran ,  Pik Shen Chee ,  Venkataramana Kotakonda ,  Kunal A. Shah ,  Ramesh Vankunavath ,  Siva Prasad Jangili Ganga ,  Ravali Pampala ,  Uma Medepalli ,  Tomer Savariego ,  Naznin Banu Wahab ,  Sindhusha Kodali ,  Manjunatha Venkatarauyappa ,  Surendar Jeevarathinam ,  Madhura Shetty ,  Deepak Sharma ,  Rohit Sharad Mahajan

IPC: G06F13/40 ,  G06F13/42

CPC classification number: G06F13/4045 ,  G06F13/4068 ,  G06F13/4282 ,  G06F2213/0026 ,  G06F2213/0042

Abstract: Embodiments herein relate to a module which can be inserted into or removed from a computing device by a user. The module includes an input-output port which is configured for a desired specification, such as USB-A, USB-C, Thunderbolt, DisplayPort or HDMI. The port can be provided on an expansion card such as an M.2 card for communicating with a host platform. The host platform can communicate with different types of modules in a standardized way so that complexity and costs are reduced. In another aspect, with a dual port module, the host platform can concurrently send/receive power through one port and send/receive data from the other port.

公开(公告)号：US20230411950A1

公开(公告)日：2023-12-21

申请号：US17842172

申请日：2022-06-16

Applicant: Intel Corporation

Inventor： Shailendra Singh Chauhan

IPC: H02H3/16 ,  H02H1/00

CPC classification number: H02H3/16 ,  H02H1/0007

Abstract: USB ports such as Type-C USB-C ports in a personal computer (PC) or other computing device may be configured in dual-role port (DRP) mode. The DRP mode may provide the ability for a port to switch between providing power to an external device and receiving power from an external power source to the into the computing device. The voltage level received from an external power source is typically higher than the voltage level provided to an external device. When a USB device fails, it may apply the higher voltage level to an external device, which may cause the external device to fail. A voltage sense and device detection circuit which may be used to detect an internal failure and prevent a higher internal voltage to be applied to a USB device.

公开(公告)号：US20230409100A1

公开(公告)日：2023-12-21

申请号：US17841550

申请日：2022-06-15

Applicant: Intel Corporation

Inventor： Shailendra Singh Chauhan ,  Arvind Sundaram ,  Manasa Nagamangala Sridhara ,  Anil Kumar Nama ,  Ramesh Vankunavath ,  Manjunath Channipura Hombaiah ,  Siva Prasad Jangili Ganga ,  Kunal Shah ,  Venkata Mahesh Gunnam ,  Chuen Ming Tan ,  Venkataramana Kotakonda

IPC: G06F1/30 ,  G06F1/28

CPC classification number: G06F1/30 ,  G06F1/28

Abstract: Embodiments herein relate to a power monitor that can be used to dynamically change a power level of an electronic device and/or operational settings of a processor of the electronic device. Specifically, the power monitor may be configured to identify “droop” of power, and logic to update the power level and/or operational settings in accordance with identification of the droop. Other embodiments may be described and claimed.

公开(公告)号：US20220337953A1

公开(公告)日：2022-10-20

申请号：US17856277

申请日：2022-07-01

Applicant: Intel Corporation

Inventor： Abhijith Prabha ,  Vamshi Krishna Aagiru ,  Shailendra Singh Chauhan

IPC: H04R5/04 ,  H04R5/033 ,  G06T7/70 ,  H04W76/40

Abstract: Techniques for wireless audio device selection are disclosed. In the illustrative embodiment, a compute device uses visual training to recognize headphones worn by a user. When the user puts on the headphones, the compute device may recognize the headphones and automatically route audio output to the headphones. In some embodiments, when selecting from several possible wireless audio output devices, the compute device may determine a distance to each of the wireless audio output devices and select one of the wireless audio output devices based on the distance to the wireless audio output device.

公开(公告)号：US20250008282A1

公开(公告)日：2025-01-02

申请号：US18342564

申请日：2023-06-27

Applicant: Intel Corporation

Inventor： Navneet Kumar Singh ,  Shailendra Singh Chauhan ,  Usha

IPC: H04R29/00 ,  H04R1/10 ,  H04R1/22

Abstract: Example systems, apparatus, articles of manufacture, and methods to improve audio quality based on load impedance sensing are disclosed. An example apparatus disclosed herein is to cause at least one test signal to be output to an audio device, a voltage of the at least one test signal based on a default load impedance. The example apparatus disclosed herein is to execute the instructions to measure a current drawn by the audio device based on the at least one test signal. The example apparatus disclosed herein is to execute the instructions to change the voltage based on an impedance profile, the impedance profile based on the measured current.

公开(公告)号：US20240006873A1

公开(公告)日：2024-01-04

申请号：US17852530

申请日：2022-06-29

Applicant: Intel Corporation

Inventor： Navneet Kumar Singh ,  Shailendra Singh Chauhan ,  Aiswarya Pious ,  Amarjeet Kumar ,  Samarth Alva

IPC: H02H5/00 ,  H01R13/66

CPC classification number: H02H5/00 ,  H01R13/6683 ,  H01R24/60

Abstract: Systems, apparatuses and methods may provide for power adapter technology that includes an adapter plug having a housing, a plurality of contacts positioned within the housing, wherein the plurality of contacts includes one or more configuration channel contacts, and a piezoelectric membrane positioned on an external surface of the housing, wherein the piezoelectric membrane is electrically connected to the one or more configuration channel contacts. Additionally, sink device technology may detect a signal from the piezoelectric membrane of the adapter plug via the configuration channel contact(s), wherein the signal indicates user contact with the adapter plug, and disconnect a bulk capacitor from a receptacle adjacent to the adapter plug in response to a disconnect condition associated with the user contact.

公开(公告)号：US20230409099A1

公开(公告)日：2023-12-21

申请号：US17841246

申请日：2022-06-15

Applicant: Intel Corporation

Inventor： Shailendra Singh Chauhan ,  Arunthathi Chandrabose ,  Ratheesh Nair ,  Arvind Tomar

IPC: G06F1/30 ,  G06F3/14 ,  H02J9/06

CPC classification number: G06F1/30 ,  G06F3/1431 ,  H02J9/062 ,  H02J2310/58

Abstract: Systems, apparatuses and methods may provide for technology that configures a computing system to be a power sink from an external display, detects an alternating current (AC) power failure with respect to the external display, and configures the computing system to be a power source for the external display in response to the AC power failure. In one example, the technology places the external display in a low power state after the AC power failure is detected.

公开(公告)号：US20230273891A1

公开(公告)日：2023-08-31

申请号：US17680902

申请日：2022-02-25

Applicant: Intel Corporation

Inventor： Mythili Hegde ,  Shailendra Singh Chauhan ,  Arunthathi Chandrabose ,  Santhosh Ap ,  Shashi Kant Singh

IPC: G06F13/42 ,  G06F1/3234 ,  G06F1/3296

CPC classification number: G06F13/4221 ,  G06F1/3253 ,  G06F1/3296 ,  G06F2213/0026

Abstract: An apparatus comprises a circuit board comprising a connector in or on the circuit board. The apparatus is to be coupled to a bus via the connector. The apparatus comprises first circuitry to communicate with a processor via the connector and bus, second circuitry to detect a utilization state of the first circuitry, determine, based on the detected utilization state of the first circuitry, a level of current to be conducted with the connector; and generate a signal indicating of whether the level of current exceeds a threshold current capacity of the connector, and third circuitry to select a first operational mode from among multiple operational modes. The first circuitry is to operate in any of the multiple operational modes responsive to the third circuitry. Additional circuitry may be provided to identify a voltage level capability of the apparatus and to configure voltage level shifting circuitry connected to the bus.

公开(公告)号：US20230092240A1

公开(公告)日：2023-03-23

申请号：US17482805

申请日：2021-09-23

Applicant: Intel Corporation

Inventor： Shailendra Singh Chauhan ,  Arunthathi Chandrabose

IPC: G06F1/26 ,  H03F3/24 ,  G06F1/3234

Abstract: An interface card includes a circuit board, a device mounted on the circuit board, and a PMIC mounted on the circuit board. The PMIC includes a PMIC processor communicatively coupled to a host processor of a host system. The PMIC processor is configured to receive an input voltage signal from a power supply that is external to the interface card. The PMIC processor generates at least one output voltage signal based on the input voltage signal. The at least one output voltage signal is supplied to the device. A power enable signal originating from the host processor is detected. The power enable signal is detected at a GPIO connector of the PMIC. The PMIC processor deactivates generation of the at least one output voltage signal based on the power enable signal.