Abstract:
An integrated device includes one or more device drivers and a micro-electro-mechanical system (MEMS) structure monolithically coupled to the one or more device drivers. The one or more device drivers are configured to process received control signals and to transmit the processed control signals to the MEMS structure. Methods of fabricating integrated devices are also disclosed.
Abstract:
A ski rack for supporting water skis in a position outboard one side of a water ski tow boat. A pair of support members are held in sockets which can be clamped to portions of the hull of the boat on the inboard side of the gunwale. Arms which are part of the support members extend at a downward slope outside the hull of the boat, and pairs of fingers which are coated with a protective plastic layer extend upwardly generally vertically from the arms, to hold water skis securely between the fingers, out of the way of passengers in the boat and out of the line of sight between the operator of the boat and a water skier being towed.
Abstract:
In one embodiment, a method of forming a metallic electrode comprises depositing a metal layer over a surface (e.g., substrate) and thermally processing the metal layer to form a conductive metallized ceramic. The metal layer may be deposited by sputtering and thermally processed by rapid thermal processing, for example. Among other advantages, embodiments of the present invention allow for the formation of conductive metallized ceramics, such as titanium-nitride, without the use of relatively expensive deposition tools.
Abstract:
An integrated device including one or more device drivers and a diffractive light modulator monolithically coupled to the one or more driver circuits. The one or more driver circuits are configured to process received control signals and to transmit the processed control signals to the diffractive light modulator. A method of fabricating the integrated device preferably comprises fabricating a front-end portion for each of a plurality of transistors, isolating the front-end portions of the plurality of transistors, fabricating a front-end portion of a diffractive light modulator, isolating the front end portion of the diffractive light modulator, fabricating interconnects for the plurality of transistors, applying an open array mask and wet etch to access the diffractive light modulator, and fabricating a back-end portion of the diffractive light modulator, thereby monolithically coupling the diffractive light modulator and the plurality of transistors.
Abstract:
A metal-bonded graphite foam composite includes a ductile metal continuous phase and a dispersed phase that includes graphite foam particles.
Abstract:
A light modulator and a method of manufacturing the same are provided having a continuously deformable optical surface. Generally, the modulator includes a substrate, a membrane disposed above and spaced apart from an upper surface of the substrate, the membrane having a continuously deformable light reflective surface formed on its upper side facing away from the upper surface of the substrate, and a means for deflecting the deformable surface relative to the substrate. Light reflected from different points of the deformable surface can interfere to modulate light reflected from the modulator in 0th order applications. In one embodiment, the membrane includes a static reflective surface surrounding the deformable surface. Light reflected from the static surface and the deformable surface can interfere to modulate light reflected from the modulator in non-0th order applications. Preferably, the static surface is substantially planar and the deformable surface are sized and shaped to define substantially equal areas. In one embodiment, the static surface circumscribes the deformable surface to define a parabolic reflector.
Abstract:
A light modulator and a method of manufacturing the same are provided having a substrate with reflectivity enhancing layers formed thereon. The layers include at least a top surface for receiving incident light, a first layer overlying the substrate, and a second layer between the top surface and the first layer, the second layer overlying and abutting the first layer. The second layer has a predetermined thickness selected in relation to an index of refraction of the second layer and to a wavelength of the incident light such that the light reflecting off an interface between the first and second layers constructively interferes with light reflected from the top surface. Preferably, the first layer also has a predetermined thickness selected such that the light reflecting off an interface between the first layer and the substrate constructively interferes with light reflected from the top surface.
Abstract:
In one embodiment a micro device is formed by depositing a sacrificial layer over a metallic electrode, forming a moveable structure over the sacrificial layer, and then etching the sacrificial layer with a noble gas fluoride. Because the metallic electrode is comprised of a metallic material that also serves as an etch stop in the sacrificial layer etch, charge does not appreciably build up in the metallic electrode. This helps stabilize the driving characteristic of the moveable structure. In one embodiment, the moveable structure is a ribbon in a light modulator.
Abstract:
A probe card for testing dice on a wafer includes a substrate, a number of cantilevers formed on a surface thereof, and a number of probes extending from unsupported ends of the cantilevers. The unsupported ends of the cantilevers project over cavities on the surface of the substrate. The probes have tips to contact pads on the dice under test. The probe card may include a compressive layer above the surface of the substrate with a number of holes through which the probes extend.
Abstract:
A method is provided which includes forming a hardmask feature adjacent to a patterned sacrificial structure of a semiconductor topography, selectively removing the patterned sacrificial structure to expose a lower layer and etching exposed portions of the lower layer in alignment with the hardmask feature. In some embodiments, forming the hardmask feature may include conformably depositing a hardmask material above the patterned sacrificial structure and lower layer as well as blanket etching the hardmask material such that upper surfaces of the patterned sacrificial structure and portions of the lower layer are exposed and portions of the hardmask material remain along sidewalls of the patterned sacrificial structure. The method may be applied to produce an exemplary semiconductor topography including a plurality of gate structures each having a width less than approximately 70 nm, wherein a variation of the widths among the plurality of gate structures is less than approximately 10%.