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    Semiconductor memory module having an oblique memory chip
    1.
    发明授权
    Semiconductor memory module having an oblique memory chip 失效
    具有倾斜存储芯片的半导体存储模块

    公开(公告)号：US07812445B2

    公开(公告)日：2010-10-12

    申请号：US11740821

    申请日：2007-04-26

    申请人： Joong-Hyun Baek ,  Sun-Won Kang ,  Moon-Jung Kim ,  Hyung-Gil Baek ,  Hee-Jin Lee

    发明人： Joong-Hyun Baek ,  Sun-Won Kang ,  Moon-Jung Kim ,  Hyung-Gil Baek ,  Hee-Jin Lee

    IPC分类号： H01L23/34

    CPC分类号： H01L25/16 ,  G11C5/04 ,  H01L21/563 ,  H01L25/0655 ,  H01L2224/73203 ,  H05K1/181 ,  H05K2201/09409 ,  H05K2201/09418 ,  H05K2201/10159 ,  Y02P70/611

    摘要： Provided is a semiconductor memory module allowing a filling member formed between a module substrate and memory chips mounted on the module substrate to completely fill the space between the module substrate and the memory chips. According to embodiments of the present invention, the semiconductor memory module includes a module substrate having at least one memory chip mounted on the substrate such that its edges are oblique to major and minor axes bisecting the module substrate. The oblique orientation allows for an improved opening between memory chips formed on the substrate so that the filling member may be properly formed between the module substrate and the memory chips to prevent voids where the filling member is not formed.

    摘要翻译： 提供了一种半导体存储器模块，其允许形成在模块基板和安装在模块基板上的存储芯片之间的填充构件完全填充模块基板和存储器芯片之间的空间。 根据本发明的实施例，半导体存储器模块包括具有安装在基板上的至少一个存储芯片的模块基板，使得其边缘对于将模块基板平分的主轴和短轴倾斜。 倾斜方向允许在基板上形成的存储芯片之间的开口改善，使得填充构件可以适当地形成在模块基板和存储芯片之间，以防止填充构件未形成的空隙。

    Semiconductor device, related method, and printed circuit board
    2.
    发明授权
    Semiconductor device, related method, and printed circuit board 失效
    半导体器件，相关方法和印刷电路板

    公开(公告)号：US07724535B2

    公开(公告)日：2010-05-25

    申请号：US11797988

    申请日：2007-05-09

    申请人： Jong-Hoon Kim ,  Jae-Jun Lee ,  Moon-Jung Kim ,  Kwang-Soo Park ,  Young-Chan Jang

    发明人： Jong-Hoon Kim ,  Jae-Jun Lee ,  Moon-Jung Kim ,  Kwang-Soo Park ,  Young-Chan Jang

    IPC分类号： H05K7/00

    CPC分类号： H05K1/0231 ,  H01L23/64 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0233 ,  H05K1/165 ,  H05K2201/09309 ,  H05K2201/10022 ,  H05K2201/1003 ,  H01L2924/00

    摘要： A semiconductor device, a method related to the semiconductor device, and a printed circuit board are disclosed. The semiconductor device includes a chip, a package including a plurality of power voltage terminals and a plurality of ground voltage terminals, wherein the chip is disposed in the package. The semiconductor device further includes an impedance circuit connected between a DC component power voltage terminal and a ground voltage, wherein the DC component power voltage terminal is one of the plurality of power voltage terminals, and an AC component interrupter connected between the DC component power voltage terminal and a power voltage. Both the AC component and a DC component of the power voltage are applied to each of the power voltage terminals except the DC component second power voltage terminal, and the ground voltage is applied to each of the ground voltage terminals.

    摘要翻译： 公开了半导体器件，与半导体器件相关的方法和印刷电路板。 半导体器件包括芯片，包括多个电源电压端子和多个接地电压端子的封装，其中芯片设置在封装中。 半导体装置还包括连接在直流分量电源端子和接地电压之间的阻抗电路，其中直流分量电源电压端子是多个电源电压端子中的一个，以及连接在直流分量电源电压 端子和电源电压。 除了直流分量第二电力电压端子之外，将电力电压的交流分量和直流分量都施加到各电力电压端子，并且将接地电压施加到每个接地电压端子。

    Semiconductor device, related method, and printed circuit board
    3.
    发明申请
    Semiconductor device, related method, and printed circuit board 失效
    半导体器件，相关方法和印刷电路板

    公开(公告)号：US20080012661A1

    公开(公告)日：2008-01-17

    申请号：US11797988

    申请日：2007-05-09

    申请人： Jong-Hoon Kim ,  Jae-Jun Lee ,  Moon-Jung Kim ,  Kwang-Soo Park ,  Young-Chan Jang

    发明人： Jong-Hoon Kim ,  Jae-Jun Lee ,  Moon-Jung Kim ,  Kwang-Soo Park ,  Young-Chan Jang

    IPC分类号： H03H7/24

    CPC分类号： H05K1/0231 ,  H01L23/64 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0233 ,  H05K1/165 ,  H05K2201/09309 ,  H05K2201/10022 ,  H05K2201/1003 ,  H01L2924/00

    摘要： A semiconductor device, a method related to the semiconductor device, and a printed circuit board are disclosed. The semiconductor device includes a chip, a package including a plurality of power voltage terminals and a plurality of ground voltage terminals, wherein the chip is disposed in the package. The semiconductor device further includes an impedance circuit connected between a DC component power voltage terminal and a ground voltage, wherein the DC component power voltage terminal is one of the plurality of power voltage terminals, and an AC component interrupter connected between the DC component power voltage terminal and a power voltage. Both the AC component and a DC component of the power voltage are applied to each of the power voltage terminals except the DC component second power voltage terminal, and the ground voltage is applied to each of the ground voltage terminals.

    摘要翻译： 公开了半导体器件，与半导体器件相关的方法和印刷电路板。 半导体器件包括芯片，包括多个电源电压端子和多个接地电压端子的封装，其中芯片设置在封装中。 半导体装置还包括连接在直流分量电源端子和接地电压之间的阻抗电路，其中直流分量电源电压端子是多个电源电压端子中的一个，以及连接在直流分量电源电压 端子和电源电压。 除了直流分量第二电力电压端子之外，将电力电压的交流分量和直流分量都施加到各电力电压端子，并且将接地电压施加到每个接地电压端子。

    Printed wires arrangement for in-line memory (IMM) module
    4.
    发明授权
    Printed wires arrangement for in-line memory (IMM) module 有权
    串行存储器（IMM）模块的印刷电线布置

    公开(公告)号：US07394160B2

    公开(公告)日：2008-07-01

    申请号：US11227161

    申请日：2005-09-16

    申请人： Moon-Jung Kim ,  Jong-Joo Lee

    发明人： Moon-Jung Kim ,  Jong-Joo Lee

    IPC分类号： H01L23/48

    CPC分类号： H05K1/181 ,  G11C5/00 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01057 ,  H05K2201/10545 ,  H05K2201/10689 ,  Y02P70/611 ,  H01L2224/0401

    摘要： An inline memory module (IMM) architecture may include: a printed circuit board (PCB); a first array of memory devices on a first side of the PCB; a second array of memory devices on a second side of the PCB; at least some of the memory devices of the first array being arranged so as to substantially overlap, relative to a reference axis of the PCB, positional-twin memory devices of the second array, respectively; and multiple vias at least some of which are parts of respective signal paths that connect signal leads of a first memory device in the first array to corresponding signal leads of a second memory device in the second array that is adjacent to a positional-twin third memory device in the second array corresponding to the first memory device.

    摘要翻译： 在线存储器模块（IMM）架构可以包括：印刷电路板（PCB）; 在PCB的第一侧上的第一阵列存储器件; 在所述PCB的第二侧上的第二阵列存储器件; 第一阵列的至少一些存储器件被布置成相对于PCB的参考轴线基本上重叠，分别位于第二阵列的位置双存储器件; 以及多个通孔，其中至少一些是将第一阵列中的第一存储器件的信号引线连接到第二阵列中的与位置双重第三存储器相邻的第二存储器件的相应信号引线的相应信号路径的部分 第二阵列中的设备对应于第一存储设备。

    Socketless planar semiconductor module
    5.
    发明申请
    Socketless planar semiconductor module 审中-公开
    无插槽平面半导体模块

    公开(公告)号：US20070176268A1

    公开(公告)日：2007-08-02

    申请号：US11646541

    申请日：2006-12-28

    申请人： Jong-Joo Lee ,  Moon-Jung Kim

    发明人： Jong-Joo Lee ,  Moon-Jung Kim

    IPC分类号： H01L23/495

    CPC分类号： H05K3/368 ,  H01L2224/16225 ,  H01L2924/19105 ,  H05K1/141 ,  H05K1/144 ,  H05K3/325 ,  H05K3/326 ,  H05K3/4092 ,  H05K2201/0397 ,  H05K2201/09063 ,  H05K2201/10598 ,  H05K2203/167

    摘要： A semiconductor module may include a printed circuit board that may have a first surface, a second surface, and at least one fixture hole. A semiconductor device may be mounted on the first surface of the printed circuit board. At least one connection terminal may be provided on one of the first surface or the second surface of the printed circuit board that may connect with connection pads of a motherboard. The printed circuit board may be connected to the motherboard through the at least one fixture hole such the connection terminals may be aligned with the connection pad and one of the first surface and second surface of the printed circuit board may face a major surface of the motherboard.

    摘要翻译： 半导体模块可以包括可以具有第一表面，第二表面和至少一个固定孔的印刷电路板。 半导体器件可以安装在印刷电路板的第一表面上。 至少一个连接端子可以设置在可与主板的连接焊盘连接的印刷电路板的第一表面或第二表面之一上。 印刷电路板可以通过至少一个固定孔连接到母板，使得连接端子可以与连接垫对准，并且印刷电路板的第一表面和第二表面中的一个可面向主板的主表面 。

    Printed wires arrangement for in-line memory (IMM) module
    7.
    发明申请
    Printed wires arrangement for in-line memory (IMM) module 有权
    串行存储器（IMM）模块的印刷电线布置

    公开(公告)号：US20060170097A1

    公开(公告)日：2006-08-03

    申请号：US11227161

    申请日：2005-09-16

    申请人： Moon-Jung Kim ,  Jong-Joo Lee

    发明人： Moon-Jung Kim ,  Jong-Joo Lee

    IPC分类号： H01L23/34

    CPC分类号： H05K1/181 ,  G11C5/00 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01057 ,  H05K2201/10545 ,  H05K2201/10689 ,  Y02P70/611 ,  H01L2224/0401

    摘要： An inline memory module (IMM) architecture may include: a printed circuit board (PCB); a first array of memory devices on a first side of the PCB; a second array of memory devices on a second side of the PCB; at least some of the memory devices of the first array being arranged so as to substantially overlap, relative to a reference axis of the PCB, positional-twin memory devices of the second array, respectively; and multiple vias at least some of which are parts of respective signal paths that connect signal leads of a first memory device in the first array to corresponding signal leads of a second memory device in the second array that is adjacent to a positional-twin third memory device in the second array corresponding to the first memory device.

    摘要翻译： 在线存储器模块（IMM）架构可以包括：印刷电路板（PCB）; 在PCB的第一侧上的第一阵列存储器件; 在所述PCB的第二侧上的第二阵列存储器件; 第一阵列的至少一些存储器件被布置成相对于PCB的参考轴线基本上重叠，分别位于第二阵列的位置双存储器件; 以及多个通孔，其中至少一些是将第一阵列中的第一存储器件的信号引线连接到第二阵列中与位置双重第三存储器相邻的第二存储器件的相应信号引线的相应信号路径的部分 第二阵列中的设备对应于第一存储设备。