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    Semiconductor memory module having an oblique memory chip
    1.
    发明授权
    Semiconductor memory module having an oblique memory chip 失效
    具有倾斜存储芯片的半导体存储模块

    公开(公告)号：US07812445B2

    公开(公告)日：2010-10-12

    申请号：US11740821

    申请日：2007-04-26

    申请人： Joong-Hyun Baek ,  Sun-Won Kang ,  Moon-Jung Kim ,  Hyung-Gil Baek ,  Hee-Jin Lee

    发明人： Joong-Hyun Baek ,  Sun-Won Kang ,  Moon-Jung Kim ,  Hyung-Gil Baek ,  Hee-Jin Lee

    IPC分类号： H01L23/34

    CPC分类号： H01L25/16 ,  G11C5/04 ,  H01L21/563 ,  H01L25/0655 ,  H01L2224/73203 ,  H05K1/181 ,  H05K2201/09409 ,  H05K2201/09418 ,  H05K2201/10159 ,  Y02P70/611

    摘要： Provided is a semiconductor memory module allowing a filling member formed between a module substrate and memory chips mounted on the module substrate to completely fill the space between the module substrate and the memory chips. According to embodiments of the present invention, the semiconductor memory module includes a module substrate having at least one memory chip mounted on the substrate such that its edges are oblique to major and minor axes bisecting the module substrate. The oblique orientation allows for an improved opening between memory chips formed on the substrate so that the filling member may be properly formed between the module substrate and the memory chips to prevent voids where the filling member is not formed.

    摘要翻译： 提供了一种半导体存储器模块，其允许形成在模块基板和安装在模块基板上的存储芯片之间的填充构件完全填充模块基板和存储器芯片之间的空间。 根据本发明的实施例，半导体存储器模块包括具有安装在基板上的至少一个存储芯片的模块基板，使得其边缘对于将模块基板平分的主轴和短轴倾斜。 倾斜方向允许在基板上形成的存储芯片之间的开口改善，使得填充构件可以适当地形成在模块基板和存储芯片之间，以防止填充构件未形成的空隙。

    Semiconductor package, method of manufacturing the same, stacked semiconductor package including the same and method of manufacturing the stacked semiconductor package
    5.
    发明申请
    Semiconductor package, method of manufacturing the same, stacked semiconductor package including the same and method of manufacturing the stacked semiconductor package 审中-公开
    半导体封装，其制造方法，包括该半导体封装的堆叠半导体封装以及制造堆叠半导体封装的方法

    公开(公告)号：US20070069396A1

    公开(公告)日：2007-03-29

    申请号：US11525903

    申请日：2006-09-25

    申请人： Hyung-Gil Baek ,  Sang-Wook Park ,  Joong-Hyun Baek

    发明人： Hyung-Gil Baek ,  Sang-Wook Park ,  Joong-Hyun Baek

    IPC分类号： H01L29/40 ,  H01L21/00

    CPC分类号： H01L23/49833 ,  H01L23/13 ,  H01L23/49816 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： Example embodiments relate to a semiconductor package, a method of manufacturing the semiconductor package, a stacked semiconductor package including the semiconductor package, and a method of manufacturing the stacked semiconductor package. Other example embodiments relate to a semiconductor package having a structure that allows at least two packages to be stacked, a method of manufacturing the semiconductor package, a stacked semiconductor package including the semiconductor package, and a method of manufacturing the stacked semiconductor package. A semiconductor package may include a first circuit substrate having signal patterns that may be formed on an outer face of the first circuit substrate, a second circuit substrate facing an inner face of the first circuit substrate, a semiconductor chip inserted between the first and second circuit substrates and electrically connected to the signal patterns, and a connection member for electrically connecting the first circuit substrate to the second circuit substrate. N (where N is an integer ≧2) semiconductor packages may be stacked to form a stacked semiconductor package.

    摘要翻译： 示例性实施例涉及半导体封装，制造半导体封装的方法，包括半导体封装的层叠半导体封装以及制造堆叠半导体封装的方法。 其他示例实施例涉及具有允许堆叠至少两个封装的结构的半导体封装，制造半导体封装的方法，包括半导体封装的堆叠半导体封装以及制造堆叠半导体封装的方法。 半导体封装可以包括具有可形成在第一电路基板的外表面上的信号图案的第一电路基板，面对第一电路基板的内表面的第二电路基板，插入在第一和第二电路之间的半导体芯片 基板并电连接到信号图案，以及连接构件，用于将第一电路基板电连接到第二电路基板。 N（其中N是整数> = 2）可以堆叠半导体封装以形成堆叠的半导体封装。

    Wafer stacked package waving bertical heat emission path and method of fabricating the same
    8.
    发明授权
    Wafer stacked package waving bertical heat emission path and method of fabricating the same 有权
    晶圆叠层包装挥发热发射路径及其制造方法

    公开(公告)号：US08310046B2

    公开(公告)日：2012-11-13

    申请号：US13235850

    申请日：2011-09-19

    申请人： Joong-Hyun Baek ,  Hee-Jin Lee

    发明人： Joong-Hyun Baek ,  Hee-Jin Lee

    IPC分类号： H01L23/34

    CPC分类号： H01L23/427 ,  H01L23/481 ,  H01L24/24 ,  H01L24/82 ,  H01L24/90 ,  H01L25/0657 ,  H01L2224/24145 ,  H01L2224/73253 ,  H01L2224/9202 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/14 ,  H01L2924/15311

    摘要： A wafer stacked semiconductor package (WSP) having a vertical heat emission path and a method of fabricating the same are provided. The WSP comprises a substrate on which semiconductor chips are mounted; a plurality of semiconductor chips stacked vertically on the substrate; a cooling through-hole formed vertically in the plurality of semiconductor chips, and sealed; micro holes formed on the circumference of the cooling through-hole; and coolant filling the inside of the cooling through-hole. Accordingly, the WSP reduces a temperature difference between the semiconductor chips and quickly dissipates the heat generated by the stacked semiconductor chips.

    摘要翻译： 提供具有垂直发热路径的晶片叠层半导体封装（WSP）及其制造方法。 WSP包括其上安装有半导体芯片的基板; 在衬底上垂直堆叠的多个半导体芯片; 在多个半导体芯片中垂直形成的冷却通孔，并被密封; 形成在冷却通孔圆周上的微孔; 并且冷却剂填充在冷却通孔的内部。 因此，WSP降低了半导体芯片之间的温度差，并且迅速消散了堆叠的半导体芯片产生的热量。