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公开(公告)号:US20230290882A1
公开(公告)日:2023-09-14
申请号:US17897050
申请日:2022-08-26
Applicant: KIOXIA CORPORATION
Inventor: Ha HOANG , Kazuhiro MATSUO , Tomoki ISHIMARU , Kenichiro TORATANI
IPC: H01L29/786 , H01L27/108
CPC classification number: H01L29/78642 , H01L27/1082 , H01L29/78693
Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, and an oxide semiconductor layer provided between the first electrode and the second electrode and including a first region, a second region between the first region and the second electrode, and a third region between the first region and the second region. A gate electrode surrounds the third region, and a gate insulating layer is between the gate electrode and the third region. A first resistivity of the first region is higher than a second resistivity of the second region. A first distance between the first electrode and the gate electrode in a first direction from the first electrode toward the second electrode is shorter than a second distance between the gate electrode and the second electrode in the first direction.
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公开(公告)号:US20240324170A1
公开(公告)日:2024-09-26
申请号:US18589286
申请日:2024-02-27
Applicant: Kioxia Corporation
Inventor: Masaya TODA , Kazuhiro MATSUO , Ha HOANG , Kota TAKAHASHI , Kenichiro TORATANI , Wakako MORIYAMA
IPC: H10B12/00
Abstract: A semiconductor device manufacturing method includes transferring a substrate including a structure that has a first surface at which indium is exposed, and a second surface at which a metal is exposed, to a chamber of a film forming device, supplying an indium reducing gas to the chamber at a first temperature at which indium is able to transition to a gaseous state, and supplying a film forming gas to the chamber at a second temperature higher than the first temperature to form a first film on the first surface and the second surface, after supplying the reducing gas.
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公开(公告)号:US20250107069A1
公开(公告)日:2025-03-27
申请号:US18884101
申请日:2024-09-12
Applicant: Kioxia Corporation
Inventor: Takeru MAEDA , Sakuya KANEKO , Kenichiro TORATANI , Takafumi OCHIAI , Kazuhiro MATSUO , Masaya TODA , Ha HOANG , Kotaro NODA
IPC: H10B12/00 , H01L29/786
Abstract: According to one embodiment a semiconductor device includes an oxide semiconductor column that extends in a first direction. A first electrode contacts a first end of the oxide semiconductor column and a second electrode contacts a second end. A gate electrode surrounds a portion of the oxide semiconductor column. A first insulating film is between the gate electrode and the oxide semiconductor column. A second insulating film is between the gate electrode and the first electrode in the first direction and surrounds the oxide semiconductor column via the first insulating film. A region in which at least a part of the oxide semiconductor column is accommodated is formed by the gate electrode and the second insulating film, and the region has a stepped surface facing towards the second electrode.
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公开(公告)号:US20250105023A1
公开(公告)日:2025-03-27
申请号:US18817372
申请日:2024-08-28
Applicant: Kioxia Corporation
Inventor: Shunichi YONEDA , Kazuhiro MATSUO , Masaya TODA , Kota TAKAHASHI , Masaya NAKATA , Kenichiro TORATANI , Ha HOANG , Takuma DOI , Wakako MORIYAMA
Abstract: A manufacturing method includes loading a substrate into a chamber, the substrate including oxide semiconductor; configuring a temperature in the chamber to a first temperature; supplying an oxidizing gas into the chamber; lowering the temperature in the chamber from the first temperature; stopping supplying the oxidizing gas into the chamber after lowering the temperature; and unloading the substrate from the chamber after the temperature in the chamber reaches a second temperature lower than the first temperature.
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公开(公告)号:US20230328957A1
公开(公告)日:2023-10-12
申请号:US17929422
申请日:2022-09-02
Applicant: Kioxia Corporation
Inventor: Masaya TODA , Tomoki ISHIMARU , Ha HOANG , Kota TAKAHASHI , Kazuhiro MATSUO , Takafumi OCHIAI , Shoji HONDA , Kenichiro TORATANI , Kiwamu SAKUMA , Taro SHIOKAWA , Mutsumi OKAJIMA
IPC: H01L27/108
CPC classification number: H01L27/10805
Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer provided between the first electrode and the second electrode; a gate electrode surrounding the oxide semiconductor layer; and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer, spaced from the first electrode, and containing nitrogen (N). In addition, a first distance between the first electrode and the gate insulating layer in a first direction from the first electrode to the second electrode is smaller than a second distance between the first electrode and the gate electrode in the first direction.
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公开(公告)号:US20220310640A1
公开(公告)日:2022-09-29
申请号:US17460967
申请日:2021-08-30
Applicant: Kioxia Corporation
Inventor: Natsuki FUKUDA , Ryota NARASAKI , Takashi KURUSU , Yuta KAMIYA , Kazuhiro MATSUO , Shinji MORI , Shoji HONDA , Takafumi OCHIAI , Hiroyuki YAMASHITA , Junichi KANEYAMA , Ha HOANG , Yuta SAITO , Kota TAKAHASHI , Tomoki ISHIMARU , Kenichiro TORATANI
IPC: H01L27/11556 , H01L27/11519 , H01L27/11565 , H01L27/11582
Abstract: A semiconductor storage device includes a first conductive layer that extends in a first direction; a second conductive layer that extends in the first direction and is arranged with the first conductive layer in a second direction; a first insulating layer that is provided between the first conductive layer and the second conductive layer; a semiconductor layer that extends in the second direction and faces the first conductive layer, the second conductive layer, and the first insulating layer in a third direction; a first charge storage layer that is provided between the first conductive layer and the semiconductor layer; a second charge storage layer that is provided between the second conductive layer and the semiconductor layer; a first high dielectric constant layer that is provided between the first conductive layer and the first charge storage layer; and a second high dielectric constant layer provided between the second conductive layer and the second charge storage layer. At least a portion of the first charge storage layer faces the second charge storage layer without the second high dielectric constant layer being interposed between the portion of the first charge storage layer and the second charge storage layer in the second direction.
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公开(公告)号:US20240421071A1
公开(公告)日:2024-12-19
申请号:US18743245
申请日:2024-06-14
Applicant: Kioxia Corporation
Inventor: Ha HOANG , Kazuhiro MATSUO , Mutsumi OKAJIMA , Takamitsu OCHI , Tsuyoshi SUGISAKI , Isamu UJIIE
IPC: H01L23/522 , G11C5/06 , H01L23/528 , H10B41/10 , H10B41/27 , H10B43/10 , H10B43/27
Abstract: A semiconductor memory device includes a plurality of memory layers arranged in a first direction, a first via-wiring extending in the first direction, a second via-wiring in a position different from a position of the first via-wiring in a second direction and extending in the first direction. One of the plurality of memory layers includes a first wiring disposed between the first and the second via-wiring and extending in a third direction, a first semiconductor layer electrically connected to the first via-wiring, a first gate electrode opposed to the first semiconductor layer and electrically connected to the first wiring, a first memory portion electrically connected to the first semiconductor layer, a second semiconductor layer electrically connected to the second via-wiring, a second gate electrode opposed to the second semiconductor layer and electrically connected to the first wiring, and a second memory portion electrically connected to the second semiconductor layer.
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公开(公告)号:US20230402548A1
公开(公告)日:2023-12-14
申请号:US18052957
申请日:2022-11-07
Applicant: Kioxia Corporation
Inventor: Ha HOANG , Kazuhiro MATSUO , Kenichiro TORATANI
IPC: H01L29/786
CPC classification number: H01L29/7869 , H01L29/78696
Abstract: In general, according to one embodiment, a semiconductor device includes first to third conductors, a semiconductor, a first insulator, and an insulation region. The semiconductor includes a metal oxide and extends in the first direction to be in contact with the first conductor and the third conductor. The insulation region is surrounded by the semiconductor and extends in the first direction to be in contact with the first conductor. The semiconductor includes a first portion and a second portion defined between the first portion and the insulation region. A concentration of a first element contained in the metal oxide of the semiconductor is higher in the second portion than in the first portion.
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公开(公告)号:US20230200050A1
公开(公告)日:2023-06-22
申请号:US17841129
申请日:2022-06-15
Applicant: Kioxia Corporation
Inventor: Akifumi GAWASE , Ha HOANG , Atsuko SAKATA , Yuta KAMIYA , Kazuhiro MATSUO , Keiichi SAWA , Kota TAKAHASHI , Kenichiro TORATANI , Yimin LIU
IPC: H01L27/108 , H01L29/786 , H01L29/66
CPC classification number: H01L27/10805 , H01L29/78642 , H01L29/7869 , H01L29/66969 , H01L27/10873
Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer between the first electrode and the second electrode; a gate electrode surrounding the oxide semiconductor layer; a gate insulating layer between the gate electrode and the oxide semiconductor layer; a first insulating layer provided between the first electrode and the gate electrode; and a second insulating layer provided between the second electrode and the gate electrode. In a cross section parallel to a first direction from the first electrode to the second electrode, a first portion of the oxide semiconductor layer is provided between the gate insulating layer and the first electrode. In the cross section, a second portion of the oxide semiconductor layer is provided between the gate insulating layer and the second electrode.
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