公开(公告)号：US20230298643A1

公开(公告)日：2023-09-21

申请号：US17944725

申请日：2022-09-14

Applicant: Kioxia Corporation

Inventor： Kensuke OTA ,  Marina YAMAGUCHI ,  Masatoshi YOSHIKAWA

IPC: G11C7/10 ,  G11C7/14 ,  G06N20/00

CPC classification number: G11C7/1096 ,  G11C7/109 ,  G11C7/1066 ,  G11C7/14 ,  G06N20/00

Abstract: A semiconductor device according to an embodiment includes first to fifth interconnects, first to third memory cells, and a control circuit. The control circuit is configured to execute machine learning. Each of the first memory cells, the second memory cells, and the third memory cells includes a resistance changing element. In the machine learning, the control circuit is configured to: execute a write operation using a common write voltage to each of the second memory cells; and after the write operation, input input data to each of the first interconnects, and change a resistance value of at least one third memory cell of the third memory cells based on the input data and a signal output from each of the fifth interconnects based on the input data.

公开(公告)号：US20230189662A1

公开(公告)日：2023-06-15

申请号：US17901773

申请日：2022-09-01

Applicant: KIOXIA CORPORATION

Inventor： Masatoshi YOSHIKAWA

IPC: H01L43/04 ,  H01L27/22 ,  H01L43/06 ,  H01L43/10

CPC classification number: H01L43/04 ,  H01L27/224 ,  H01L27/228 ,  H01L43/06 ,  H01L43/10

Abstract: A magnetic memory device includes first, second, and third conductor layers, and a memory cell that is coupled to the first, second, and third conductor layers. The memory cell includes a fourth conductor layer and a magnetoresistance effect element. The fourth conductor layer includes first, second, and third portions coupled to the first, second, and third conductor layers, respectively. The third portion is between the first and second portions. The magnetoresistance effect element is coupled between a third conductor and the fourth conductor layer. The fourth conductor layer includes a magnetic layer and a non-magnetic layer that is between the magnetic layer and the magnetoresistance effect element. The magnetic layer has a first saturation magnetization during a standby state or a read state of the memory cell, and has a second saturation magnetization larger than the first saturation magnetization during a write state of the memory cell.

公开(公告)号：US20240324241A1

公开(公告)日：2024-09-26

申请号：US18594394

申请日：2024-03-04

Applicant: Kioxia Corporation

Inventor： Masatoshi YOSHIKAWA ,  Tian LI

IPC: H10B61/00 ,  H10N50/01 ,  H10N50/20

CPC classification number: H10B61/00 ,  H10N50/01 ,  H10N50/20

Abstract: According to one embodiment, there is provided a magnetic memory device including a first conductive layer; and a first magnetoresistive effect element and a second magnetoresistive effect element that each extends in a first direction, are provided apart from each other in a second direction crossing the first direction, and are each in contact with the first conductive layer, wherein the first conductive layer includes a first portion that does not overlap with any of the first magnetoresistive effect element and the second magnetoresistive effect element when viewed in the first direction, a second portion that overlaps with a central region of the first magnetoresistive effect element when viewed in the first direction, and a third portion that overlaps with an edge region of the first magnetoresistive effect element when viewed in the first direction.

公开(公告)号：US20230082665A1

公开(公告)日：2023-03-16

申请号：US17684104

申请日：2022-03-01

Applicant: KIOXIA CORPORATION

Inventor： Masatoshi YOSHIKAWA

IPC: H01L43/02 ,  H01L43/10 ,  H01L27/22 ,  G11C11/16

Abstract: A magnetic memory device includes a three-terminal type memory cell. A first terminal is connected to a first conductor layer. A second terminal is connected to a second conductor layer. A third terminal is connected to a third conductor layer. The memory cell includes a fourth conductor connected to the first conductor layer, the second conductor layer, and the third conductor layer. A magnetoresistance effect element of the memory cell is coupled between the third conductor layer and the fourth conductor layer. A first switching element is coupled to the second conductor layer and the fourth conductor layer. A second switching element coupled to the first conductor layer and the third conductor layer. The fourth conductor layer includes a first ferromagnetic layer and a first non-magnetic layer. The first non-magnetic layer comprises at least one of ruthenium, iridium, rhodium, or osmium.

公开(公告)号：US20220302383A1

公开(公告)日：2022-09-22

申请号：US17460898

申请日：2021-08-30

Applicant: Kioxia Corporation

Inventor： Jieqiong ZHANG ,  Masatoshi YOSHIKAWA ,  Tadaomi DAIBOU

IPC: H01L45/00 ,  H01L27/24

Abstract: According to one embodiment, a selector device includes a first electrode, a second electrode, and a selector layer disposed between the first electrode and the second electrode. At least one of the first electrode or the second electrode includes a stacked film. The stacked film includes a first layer including a first material with a first Debye temperature, and a second layer in contact with the first layer and including a second material with a second Debye temperature lower than the first Debye temperature. A ratio of the first Debye temperature to the second Debye temperature is equal to or greater than 5.

公开(公告)号：US20230069841A1

公开(公告)日：2023-03-09

申请号：US17682667

申请日：2022-02-28

Applicant: KIOXIA CORPORATION

Inventor： Yoshiaki ASAO ,  Masatoshi YOSHIKAWA

IPC: G11C11/16 ,  H01L27/22 ,  H01L43/08 ,  G11C5/08

Abstract: According to one embodiment, a magnetic memory device includes first to third conductor layers, and a three-terminal-type memory cell connected to the first to third conductor layers. The first memory cell includes a fourth conductor layer, a magnetoresistance effect element, a two-terminal-type first switching element, and a two-terminal-type second switching element. The fourth conductor layer includes a first portion connected to the first conductor layer, a second portion connected to the second conductor layer, and a third portion which is connected to the third conductor layer. The magnetoresistance effect element is connected between the third conductor layer and the fourth conductor layer. The first switching element is connected between the second conductor layer and the fourth conductor layer. The second switching element is connected between the first conductor layer and the third conductor layer.

公开(公告)号：US20210202838A1

公开(公告)日：2021-07-01

申请号：US17014587

申请日：2020-09-08

Applicant: Kioxia Corporation

Inventor： Hiroki KAWAI ,  Katsuyoshi KOMATSU ,  Tadaomi DAIBOU ,  Hiroki TOKUHIRA ,  Masatoshi YOSHIKAWA ,  Yuichi ITO

IPC: H01L45/00

Abstract: A resistance variable device of an embodiment includes a stack arranged between a first electrode and a second electrode and including a resistance variable layer and a chalcogen-containing layer. The chalcogen-containing layer contains a material having a composition represented by a general formula: C1xC2yAz, where C1 is at least one element selected from Sc, Y, Zr, and Hf, C2 is at least one element selected from C, Si, Ge, B, Al, Ga, and In, A is at least one element selected from S, Se, and Te, and x, y, and z are numbers representing atomic ratios satisfying 0

公开(公告)号：US20240079039A1

公开(公告)日：2024-03-07

申请号：US18178993

申请日：2023-03-06

Applicant: Kioxia Corporation

Inventor： Masatoshi YOSHIKAWA

IPC: G11C11/16 ,  H10B61/00 ,  H10N50/10 ,  H10N50/85

CPC classification number: G11C11/161 ,  G11C11/1675 ,  H10B61/22 ,  H10N50/10 ,  H10N50/85

Abstract: A magnetic memory device includes first to third conductors and a 3-terminal type memory cell coupled to the first to third conductors. The memory cell includes: a fourth conductor and a magnetoresistance effect element provided between the fourth and third conductors. The magnetoresistance effect element includes: a first ferromagnet in contact with the fourth conductor; a second ferromagnet provided in an opposite side of the fourth conductor with respect to the first ferromagnet; a dielectric between the first and second ferromagnets; a third ferromagnet provided in an opposite side of the first ferromagnet with respect to the second ferromagnet; and a nonmagnet provided between the second and third ferromagnets. A concentration of a noble metal contained in the first ferromagnet is higher than a concentration of the noble metal contained in the second ferromagnet.

公开(公告)号：US20240049475A1

公开(公告)日：2024-02-08

申请号：US18176464

申请日：2023-02-28

Applicant: Kioxia Corporation

Inventor： Yoshihiro UEDA ,  Masatoshi YOSHIKAWA

IPC: H10B61/00 ,  G11C11/16 ,  H10N50/80 ,  H10N50/10

CPC classification number: H10B61/22 ,  G11C11/1675 ,  G11C11/161 ,  G11C11/1697 ,  G11C11/1673 ,  H10N50/80 ,  H10N50/10

Abstract: A magnetic memory includes first conductive lines, a second conductive line, a third conductive line, a fourth conductive line, a conductive layer, magnetoresistive elements, first transistors, a second transistor, and a third transistor. Each magnetoresistive element is arranged between the conductive layer and the second conductive line and includes a first magnetic layer, a second magnetic layer between the first magnetic layer and the second conductive line, and a first non-magnetic layer between the first magnetic layer and the second magnetic layer. Each first transistor is connected between the conductive layer and one of the magnetoresistive elements, and has a gate which is a part of one the first conductive lines. A second transistor is connected between a first end of the second conductive line and the third conductive line. A third transistor is connected between a second end of the second conductive line and the fourth conductive line.