公开(公告)号：US11892907B2

公开(公告)日：2024-02-06

申请号：US17984309

申请日：2022-11-10

Applicant: Kioxia Corporation

Inventor： Tsukasa Tokutomi ,  Masanobu Shirakawa ,  Marie Takada ,  Masamichi Fujiwara ,  Kazumasa Yamamoto ,  Naoaki Kokubun ,  Tatsuro Hitomi ,  Hironori Uchikawa

IPC: H03M13/00 ,  G06F11/10 ,  H03M13/11 ,  H03M13/37 ,  H03M13/29 ,  H03M13/15

CPC classification number: G06F11/1068 ,  G06F11/1012 ,  G06F11/1048 ,  H03M13/1105 ,  H03M13/1108 ,  H03M13/1111 ,  H03M13/152 ,  H03M13/2906 ,  H03M13/3715 ,  H03M13/6505

Abstract: In general, according to an embodiment, a memory system includes a memory device including a memory cell; and a controller. The controller is configured to: receive first data from the memory cell in a first data reading; receive second data from the memory cell in a second data reading that is different from the first data reading; convert a first value that is based on the first data and the second data, to a second value in accordance with a first relationship; and convert the first value to a third value in accordance with a second relationship that is different from the first relationship.

公开(公告)号：US11537465B2

公开(公告)日：2022-12-27

申请号：US17174399

申请日：2021-02-12

Applicant: KIOXIA CORPORATION

Inventor： Tsukasa Tokutomi ,  Masanobu Shirakawa ,  Marie Takada ,  Masamichi Fujiwara ,  Kazumasa Yamamoto ,  Naoaki Kokubun ,  Tatsuro Hitomi ,  Hironori Uchikawa

IPC: H03M13/00 ,  G06F11/10 ,  H03M13/11 ,  H03M13/37 ,  H03M13/29 ,  H03M13/15

Abstract: In general, according to an embodiment, a memory system includes a memory device including a memory cell; and a controller. The controller is configured to: receive first data from the memory cell in a first data reading; receive second data from the memory cell in a second data reading that is different from the first data reading; convert a first value that is based on the first data and the second data, to a second value in accordance with a first relationship; and convert the first value to a third value in accordance with a second relationship that is different from the first relationship.

公开(公告)号：US11422712B2

公开(公告)日：2022-08-23

申请号：US17121024

申请日：2020-12-14

Applicant: Kioxia Corporation

Inventor： Yasuhito Yoshimizu ,  Takashi Fukushima ,  Tatsuro Hitomi ,  Arata Inoue ,  Masayuki Miura ,  Shinichi Kanno ,  Toshio Fujisawa ,  Keisuke Nakatsuka ,  Tomoya Sanuki

IPC: G06F3/06 ,  G06F12/1009 ,  G06F12/02

Abstract: According to one embodiment, a storage device includes a stage on which a semiconductor wafer can be mounted, wherein data is capable of being read from the semiconductor wafer or data is capable of being written to the semiconductor wafer. The storage device further includes a plurality of probe pins for reading or writing data, and a controller connected the probe pins. The semiconductor wafer includes electrodes connectable to the probe pins, a first memory area that can store user data, and a second memory area that can store identification information for identification of the semiconductor wafer and a check code for checking integrity of the identification information. The controller is capable of reading the identification information and the check code from the second memory area.

公开(公告)号：US12190966B2

公开(公告)日：2025-01-07

申请号：US17899447

申请日：2022-08-30

Applicant: KIOXIA CORPORATION

Inventor： Tomoya Sanuki ,  Hitomi Tanaka ,  Tatsuro Hitomi ,  Yasuhito Yoshimizu ,  Masayuki Miura ,  Yoshihiro Ohba

IPC: G11C16/26 ,  G11C16/04 ,  G11C16/34 ,  H10B43/00

Abstract: A method of processing a memory system that includes a substrate with a connector and a semiconductor memory chip connected to the connector is provided. The method includes detaching the semiconductor memory chip from the connector, performing an annealing process with respect to the semiconductor memory chip detached from the connector, and after the annealing process, attaching the semiconductor memory chip to the connector on the substrate.

公开(公告)号：US20240201660A1

公开(公告)日：2024-06-20

申请号：US18592235

申请日：2024-02-29

Applicant: Kioxia Corporation

Inventor： Tatsuro Hitomi ,  Yasuhito Yoshimizu ,  Masayuki Miura ,  Mitoshi Miyaoka ,  Tetsuharu Kojima ,  Tomoya Sanuki

IPC: G05B19/4155

CPC classification number: G05B19/4155 ,  G05B2219/40036

Abstract: According to one embodiment, a package stocker is configured to store a plurality of semiconductor packages each including one or more nonvolatile memory dies. A drive includes at least one socket on which a semiconductor package is able to be detachably mounted. A host apparatus, which is communicatively connected to the drive, reads/writes data from/to the one or more nonvolatile memory dies of the semiconductor package mounted on the socket. When a first semiconductor package is not mounted on the socket, the host apparatus causes a package transport device to transport the first semiconductor package to the drive and to mount the first semiconductor package on the socket.

公开(公告)号：US11923325B2

公开(公告)日：2024-03-05

申请号：US17695654

申请日：2022-03-15

Applicant: Kioxia Corporation

Inventor： Yasuhito Yoshimizu ,  Takashi Fukushima ,  Tatsuro Hitomi ,  Arata Inoue ,  Masayuki Miura ,  Shinichi Kanno ,  Toshio Fujisawa ,  Keisuke Nakatsuka ,  Tomoya Sanuki

IPC: H01L23/00 ,  G06F11/07 ,  H01L23/544

CPC classification number: H01L24/05 ,  G06F11/073 ,  G06F11/0751 ,  H01L23/544 ,  H01L2223/5446 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05164 ,  H01L2924/14511

Abstract: A memory chip unit includes a pad electrode including first and second portions, and a memory cell array. A prober includes a probe card and a movement mechanism. The probe card includes a probe electrode to be in contact with the pad electrode, and a memory controller electrically coupled to the probe electrode and executes reading and writing on the memory cell array. The movement mechanism executes a first operation that brings the probe electrode into contact with the first portion and does not bring the probe electrode into contact with the second portion, and a second operation that does not bring the probe electrode into contact with the first portion and brings the probe electrode into contact with the second portion.