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公开(公告)号:US20230012978A1
公开(公告)日:2023-01-19
申请号:US17946328
申请日:2022-09-16
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Qisong LIN , Vamsi Pavan RAYAPROLU , Jiangang WU , Sampath K. RATNAM , Sivagnanam PARTHASARATHY , Shao Chun SHI
IPC: G06F11/07
Abstract: A system includes a memory component to, upon completion of second pass programming in response to a multi-pass programming command, write a plurality of flag bits within a group of memory cells programmed by the multi-pass programming command. The system also includes a processing device, operatively coupled to the memory component. The processing device is to detect an error in attempting to read a top page of the group of memory cells, determine a number of first values within the plurality of flag bits, and in response to the number of first values not satisfying a threshold criterion, report, to a host computing device, an uncorrectable data error due to the top page of the group of memory cells being incompletely programmed.
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公开(公告)号:US20220293208A1
公开(公告)日:2022-09-15
申请号:US17198755
申请日:2021-03-11
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Kishore Kumar MUCHHERLA , Mustafa N. KAYNAK , Sivagnanam PARTHASARATHY , Xiangang LUO , Peter FEELEY , Devin M. BATUTIS , Jiangang WU , Sampath K RATNAM , Shane NOWELL , Karl D. Schuh
Abstract: A voltage calibration scan is initiated. A first value of a data state metric measured for a sample block of a memory device based on associated with a first bin of blocks designated as a current is received. The first value is designated as a minimum value. A second value of the data state metric for the sample block is measured based on a set of read voltage offsets associated with a second bin of blocks having an index value higher than the current bin. In response to determining that the second value exceeds the first value, the first bin is maintained as the current bin and the voltage calibration scan is stopped.
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公开(公告)号:US20220383955A1
公开(公告)日:2022-12-01
申请号:US17883538
申请日:2022-08-08
Applicant: Micron Technology, Inc.
Inventor: Kishore Kumar MUCHHERLA , Sampath K. RATNAM , Shane NOWELL , Sivagnanam PARTHASARATHY , Mustafa N. KAYNAK , Karl D. SCHUH , Peter FEELEY , Jiangang WU
Abstract: A processing device of a memory sub-system is configured to detect a power on event that is associated with a memory device and indicates that power has been restored to the memory device; estimate a duration of a power off state preceding the power on event associated with the memory device; and update voltage bin assignments of a plurality of blocks associated with the memory device based on the duration of the power off state.
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