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公开(公告)号：US09754720B2
公开(公告)日：2017-09-05
申请号：US14918817
申请日：2015-10-21
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takayuki Yao
CPC classification number: H01G4/1227 , C04B35/4682 , C04B2235/3206 , C04B2235/3217 , C04B2235/3224 , C04B2235/3236 , C04B2235/3239 , C04B2235/3244 , C04B2235/3267 , C04B2235/3418 , C04B2235/5445 , C04B2235/6584 , C04B2235/661 , H01G4/0085 , H01G4/012 , H01G4/12 , H01G4/248 , H01G4/30
Abstract: A multilayer ceramic capacitor that has alternately stacked dielectric layers containing, as their main constituent, a barium titanate based compound that has a perovskite-type crystal structure; and internal electrode layers with electrode defects. The internal electrode layers are 0.6 μm or less in thickness. The electrode defects have electrode defects containing an Al—Si based oxide mainly containing Al and Si. The number of the electrode defects containing the Al—Si based oxide is 30% or more in number ratio to the total number of electrode defects in the internal electrodes.
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2.发明授权Dielectric ceramic, laminated ceramic capacitor, method for producing the dielectric ceramic, and method for manufacturing the multilayer ceramic capacitor 有权介电陶瓷，层叠陶瓷电容器，电介质陶瓷的制造方法以及多层陶瓷电容器的制造方法公开(公告)号：US09061944B2
公开(公告)日：2015-06-23
申请号：US13753845
申请日：2013-01-30
Applicant: MURATA MANUFACTURING CO., LTD.
Inventor： Megumi Fukuda , Takayuki Yao
IPC: H01G4/06 , C04B35/00 , C04B35/46 , C04B35/468 , H01B3/12 , H01G4/12 , H01G4/30 , B32B18/00 , C01G23/00 , C04B35/626 , C04B35/638 , C01G37/14 , C01G45/12 , B82Y30/00
CPC classification number: C04B35/46 , B32B18/00 , B82Y30/00 , C01G23/003 , C01G37/14 , C01G45/1264 , C01P2004/62 , C01P2004/64 , C04B35/4682 , C04B35/6261 , C04B35/62675 , C04B35/638 , C04B2235/3206 , C04B2235/3208 , C04B2235/3215 , C04B2235/3217 , C04B2235/3224 , C04B2235/3225 , C04B2235/3227 , C04B2235/3229 , C04B2235/3232 , C04B2235/3241 , C04B2235/3262 , C04B2235/3284 , C04B2235/3418 , C04B2235/44 , C04B2235/5454 , C04B2235/6584 , C04B2235/72 , C04B2235/781 , C04B2235/785 , C04B2237/346 , C04B2237/704 , H01B3/12 , H01G4/1209 , H01G4/1227 , H01G4/30 , Y10T29/435
Abstract: Provided is a laminated ceramic capacitor which produces excellent lifetime characteristics in a high-temperature loading test even when dielectric layers are reduced in thickness. The dielectric ceramic contains, as its main constituent, a compound represented by the general formula (Ba1-x-yCaxRey)(Ti1-zMz)O3 (where Re is at least one or more elements selected from among La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, and Y, and M is at least one or more elements selected from among Mg, Mn, Al, Cr, and Zn), 0≦x≦0.2, 0.002≦y≦0.1, and 0.001≦z≦0.05. This dielectric ceramic has crystal grains of 20 nm or more and 150 nm or less in average grain size.
Abstract translation: 提供一种层叠陶瓷电容器，其即使在电介质层的厚度减小时也能在高温负载试验中产生优异的寿命特性。 电介质陶瓷作为其主要成分含有由通式（Ba1-x-yCaxRey）（Ti1-zMz）O3表示的化合物（其中Re为选自La，Ce，Pr，Nd中的至少一种以上的元素） ，Sm，Eu，Gd，Tb，Dy，Ho，Er，Tm，Yb，Lu和Y，M是选自Mg，Mn，Al，Cr和Zn中的至少一种以上的元素）0＆ x＆nlE; 0.2,0.002＆amp; nlE; y＆nlE; 0.1和0.001＆amp; nlE; z＆nlE; 0.05。 该电介质陶瓷的平均粒径为20nm以上且150nm以下的晶粒。
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公开(公告)号：US11239030B2
公开(公告)日：2022-02-01
申请号：US16566994
申请日：2019-09-11
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Hideyuki Hashimoto , Daiki Fukunaga , Takayuki Yao , Takehisa Sasabayashi
Abstract: An electronic component includes a laminate including internal electrodes alternately laminated in a lamination direction with dielectric layers interposed therebetween. The laminate includes main surfaces opposite to each other in the lamination direction, side surfaces opposite to each other in a width direction, and end surfaces opposite to each other in a length direction, and external electrodes provided on surfaces of the laminate and electrically connected to the internal electrodes. Each of the dielectric layers includes Ti and Mg. When a cross section including the length direction and the width direction of the laminate is viewed from the lamination direction, side margin portions in which the internal electrodes do not exist each include a dielectric including Ti and Mg with a molar ratio in each of the side margin portions smaller than a molar ratio of Mg to Ti included in each of the dielectric layers.
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公开(公告)号：US20130294011A1
公开(公告)日：2013-11-07
申请号：US13937305
申请日：2013-07-09
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takayuki Yao
CPC classification number: H01G4/30 , H01G4/012 , H01G4/12 , H01G4/1227
Abstract: Provide is a laminated ceramic capacitor which can suppress the decrease in dielectric constant even when ceramic layers are further reduced in thickness. The laminated ceramic capacitor includes a laminate having a plurality of stacked ceramic layers stacked and a plurality of internal electrodes formed along interfaces between the ceramic layers; and a plurality of external electrodes formed on the outer surface of the laminate and electrically connected to the internal electrodes ceramic grains in contact with both of adjacent internal electrodes adjacent with a ceramic layer interposed therebetween are present in the ceramic layers and the internal electrodes are 0.60 μm or less in thickness.
Abstract translation: 提供一种层叠陶瓷电容器，即使陶瓷层的厚度进一步减小，也能够抑制介电常数的降低。 层叠陶瓷电容器包括层叠有多个层叠陶瓷层的层叠体和沿着陶瓷层之间的界面形成的多个内部电极; 并且形成在层叠体的外表面上并与内部电极电连接的多个外部电极存在于陶瓷层中，并且内部电极为0.60 妈妈或以下厚度。
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公开(公告)号：US09530564B2
公开(公告)日：2016-12-27
申请号：US14869438
申请日：2015-09-29
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takayuki Yao
IPC: C04B35/00 , H01G4/12 , H01G4/30 , H01B3/12 , C04B35/468 , C04B35/626 , H01G4/008
CPC classification number: H01G4/1227 , C04B35/4682 , C04B35/62685 , C04B2235/3206 , C04B2235/3217 , C04B2235/3218 , C04B2235/3224 , C04B2235/3236 , C04B2235/3239 , C04B2235/3244 , C04B2235/3267 , C04B2235/3418 , C04B2235/5445 , C04B2235/6584 , H01B3/12 , H01G4/008 , H01G4/0085 , H01G4/30
Abstract: A dielectric ceramic that contains Al and Si, as well as a barium titanate-based compound having a perovskite type crystal structure as a primary component. The total molar amount of Al and Si is 2 to 4 parts by mole with respect to 100 parts by mole of Ti, and the content ratio of Al with respect to the total molar amount is 0.2 or less (excluding 0) on the molar ratio basis. The dielectric ceramic may also contain at least one specific rare earth element Re, such as Gd, Tb, or Dy.
Abstract translation: 含有Al和Si的电介质陶瓷，以及以钙钛矿型晶体结构为主要成分的钛酸钡类化合物。 相对于100份摩尔的Ti，Al和Si的总摩尔量为2〜4份摩尔，Al的总摩尔量相对于总摩尔量的含有比例为0.2以下（不包括0）摩尔比 基础。 电介质陶瓷也可以含有至少一种特定的稀土元素Re，例如Gd，Tb或Dy。
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Patent Agency Ranking
公开(公告)号：US09355781B2
公开(公告)日：2016-05-31
申请号：US13937305
申请日：2013-07-09
Applicant: MURATA MANUFACTURING CO., LTD.
Inventor： Takayuki Yao
CPC classification number: H01G4/30 , H01G4/012 , H01G4/12 , H01G4/1227
Abstract: Provide is a laminated ceramic capacitor which can suppress the decrease in dielectric constant even when ceramic layers are further reduced in thickness. The laminated ceramic capacitor includes a laminate having a plurality of stacked ceramic layers stacked and a plurality of internal electrodes formed along interfaces between the ceramic layers; and a plurality of external electrodes formed on the outer surface of the laminate and electrically connected to the internal electrodes ceramic grains in contact with both of adjacent internal electrodes adjacent with a ceramic layer interposed therebetween are present in the ceramic layers and the internal electrodes are 0.60 μm or less in thickness.
Abstract translation: 提供一种层叠陶瓷电容器，即使陶瓷层的厚度进一步减小，也能够抑制介电常数的降低。 层叠陶瓷电容器包括层叠有多个层叠陶瓷层的层叠体和沿着陶瓷层之间的界面形成的多个内部电极; 并且形成在层叠体的外表面上并与内部电极电连接的多个外部电极存在于陶瓷层中，并且内部电极为0.60 μm以下。
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公开(公告)号：US08797713B2
公开(公告)日：2014-08-05
申请号：US14065156
申请日：2013-10-28
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Takayuki Yao
CPC classification number: H01G4/1245 , C04B35/4682 , C04B2235/3206 , C04B2235/3208 , C04B2235/3213 , C04B2235/3224 , C04B2235/3225 , C04B2235/3229 , C04B2235/3244 , C04B2235/3262 , C04B2235/3418 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/785 , C04B2235/79 , C04B2235/85 , H01G4/1218 , H01G4/1227 , H01G4/30
Abstract: Provided is a laminated ceramic capacitor that can suppress the decrease in insulation resistance after a moisture-resistance loading test. It contains ceramic layers which include: main-phase grains that have a perovskite-type compound containing Ba and Ti and optionally containing Ca, Sr, Zr, and Hf; and secondary-phase grains that have an average grain size of 100 nm or more and have a Si content of 50 mol % or more per grain, the average grain boundary number, represented by (Average Thickness for Ceramic Layers 3)/(Average Grain Size for Main Phase Grains)−1, is greater than 0 and 3.0 or less, and the average grain size for the secondary-phase grains is ¼ or more of the average thickness for the ceramic layers 3.
Abstract translation: 提供一种能够抑制耐湿负荷试验后的绝缘电阻降低的层叠陶瓷电容器。 它包含陶瓷层，其包括：具有含有Ba和Ti并且任选地含有Ca，Sr，Zr和Hf的钙钛矿型化合物的主相晶粒; 平均粒径为100nm以上，Si含量为50％以上的二相晶粒，平均晶界数（陶瓷层3的平均厚度）/（平均粒径 主晶粒的尺寸）-1大于0和3.0以下，二相晶粒的平均晶粒尺寸为陶瓷层3的平均厚度的1/4以上。
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公开(公告)号：US20140049876A1
公开(公告)日：2014-02-20
申请号：US14065156
申请日：2013-10-28
Applicant: MURATA MANUFACTURING CO., LTD.
Inventor： Takayuki Yao
IPC: H01G4/12
CPC classification number: H01G4/1245 , C04B35/4682 , C04B2235/3206 , C04B2235/3208 , C04B2235/3213 , C04B2235/3224 , C04B2235/3225 , C04B2235/3229 , C04B2235/3244 , C04B2235/3262 , C04B2235/3418 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/785 , C04B2235/79 , C04B2235/85 , H01G4/1218 , H01G4/1227 , H01G4/30
Abstract: Provided is a laminated ceramic capacitor that can suppress the decrease in insulation resistance after a moisture-resistance loading test. It contains ceramic layers which include: main-phase grains that have a perovskite-type compound containing Ba and Ti and optionally containing Ca, Sr, Zr, and Hf; and secondary-phase grains that have an average grain size of 100 nm or more and have a Si content of 50 mol % or more per grain, the average grain boundary number, represented by (Average Thickness for Ceramic Layers 3)/(Average Grain Size for Main Phase Grains)−1, is greater than 0 and 3.0 or less, and the average grain size for the secondary-phase grains is 1/4 or more of the average thickness for the ceramic layers 3.
Abstract translation: 提供一种能够抑制耐湿负荷试验后的绝缘电阻降低的层叠陶瓷电容器。 它包含陶瓷层，其包括：具有含有Ba和Ti并且任选地含有Ca，Sr，Zr和Hf的钙钛矿型化合物的主相晶粒; 平均粒径为100nm以上，Si含量为50％以上的二相晶粒，平均晶界数（陶瓷层3的平均厚度）/（平均粒径 主晶粒尺寸）-1大于0和3.0以下，二相晶粒的平均晶粒尺寸为陶瓷层3的平均厚度的1/4以上。
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9.发明授权Method for manufacturing ceramic electronic component, and ceramic electronic component 有权陶瓷电子部件的制造方法和陶瓷电子部件公开(公告)号：US09328026B2
公开(公告)日：2016-05-03
申请号：US14140741
申请日：2013-12-26
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Kenichi Okajima , Daiki Fukunaga , Takayuki Yao , Yasunari Nakamura , Akihiro Shiota
CPC classification number: C04B37/001 , B32B18/00 , C04B2237/346 , C04B2237/58 , C04B2237/704 , C04B2237/80 , H01G4/1227 , H01G4/1281 , H01G4/30 , Y10T29/43
Abstract: A raw ceramic portion is formed on each of first and second lateral surfaces of a raw ceramic body. The raw ceramic portions contain ceramic particles and more of at least one constituent selected from Ba, Mg, Mn, and a rare-earth element between the ceramic particles than the ceramic section of the raw ceramic body in terms of total amount. The raw ceramic body is fired with the raw ceramic portions thereon. In this way, a ceramic electronic component is obtained that has a main body left after the raw ceramic body is fired with the raw ceramic portions thereon.
Abstract translation: 原料陶瓷部分形成在原料陶瓷体的第一和第二侧表面的每一个上。 原料陶瓷部分在陶瓷颗粒之外含有陶瓷颗粒和更多的选自Ba，Mg，Mn和稀土元素中的至少一种，而不是陶瓷颗粒的总量的陶瓷部分。 原料陶瓷体在其上被烧制。 以这种方式，获得陶瓷电子部件，其中在原料陶瓷体被烧制之后留下的主体在其上留下。
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10.发明申请DIELECTRIC CERAMIC, LAMINATED CERAMIC CAPACITOR, METHOD FOR PRODUCING THE DIELECTRIC CERAMIC, AND METHOD FOR MANUFACTURING THE MULTILAYER CERAMIC CAPACITOR 有权电介质陶瓷，层压陶瓷电容器，制造电介质陶瓷的方法以及制造多层陶瓷电容器的方法公开(公告)号：US20130141838A1
公开(公告)日：2013-06-06
申请号：US13753845
申请日：2013-01-30
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Megumi Fukuda , Takayuki Yao
CPC classification number: C04B35/46 , B32B18/00 , B82Y30/00 , C01G23/003 , C01G37/14 , C01G45/1264 , C01P2004/62 , C01P2004/64 , C04B35/4682 , C04B35/6261 , C04B35/62675 , C04B35/638 , C04B2235/3206 , C04B2235/3208 , C04B2235/3215 , C04B2235/3217 , C04B2235/3224 , C04B2235/3225 , C04B2235/3227 , C04B2235/3229 , C04B2235/3232 , C04B2235/3241 , C04B2235/3262 , C04B2235/3284 , C04B2235/3418 , C04B2235/44 , C04B2235/5454 , C04B2235/6584 , C04B2235/72 , C04B2235/781 , C04B2235/785 , C04B2237/346 , C04B2237/704 , H01B3/12 , H01G4/1209 , H01G4/1227 , H01G4/30 , Y10T29/435
Abstract: Provided is a laminated ceramic capacitor which produces excellent lifetime characteristics in a high-temperature loading test even when dielectric layers are reduced in thickness. The dielectric ceramic contains, as its main constituent, a compound represented by the general formula (Ba1-x-yCaxRey)(Ti1-zMz)O3 (where Re is at least one or more elements selected from among La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, and Y, and M is at least one or more elements selected from among Mg, Mn, Al, Cr, and Zn), 0≦x≦0.2, 0.002≦y≦0.1, and 0.001≦z≦0.05. This dielectric ceramic has crystal grains of 20 nm or more and 150 nm or less in average grain size.
Abstract translation: 提供一种层叠陶瓷电容器，其即使在电介质层的厚度减小时也能在高温负载试验中产生优异的寿命特性。 电介质陶瓷作为其主要成分含有由通式（Ba1-x-yCaxRey）（Ti1-zMz）O3表示的化合物（其中Re为选自La，Ce，Pr，Nd中的至少一种以上的元素） ，Sm，Eu，Gd，Tb，Dy，Ho，Er，Tm，Yb，Lu和Y，M是选自Mg，Mn，Al，Cr和Zn中的至少一种以上的元素） x@0.2,0.002 @ y @ 0.1和0.001 @ z @ 0.05。 该电介质陶瓷的平均粒径为20nm以上且150nm以下的晶粒。
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