公开(公告)号：US20240097689A1

公开(公告)日：2024-03-21

申请号：US17933327

申请日：2022-09-19

Applicant: QUALCOMM Incorporated

Inventor： Jianjun YU ,  Tomas O'SULLIVAN ,  Razak HOSSAIN ,  Lai Kan LEUNG

IPC: H03L7/197 ,  H04L7/033

CPC classification number: H03L7/1976 ,  H04L7/033

Abstract: Aspects of the present disclosure provide techniques and apparatus for synchronizing phase-locked loop (PLL) circuits. An example method of operating PLL circuits includes obtaining an indication to perform a synchronizing action at a first PLL circuit and a second PLL circuit; and performing the synchronizing action at the first PLL circuit and the second PLL circuit in response to obtaining the indication.

公开(公告)号：US20220393565A1

公开(公告)日：2022-12-08

申请号：US17340953

申请日：2021-06-07

Applicant: QUALCOMM Incorporated

Inventor： Alvin Siu-Chi LI ,  Tomas O'SULLIVAN ,  Jianjun YU ,  Yiwu TANG

IPC: H02M1/00 ,  H02M1/084

Abstract: An aspect relates to an apparatus including an input buffer including an input configured to receive an input voltage; a ramp voltage generator including an input coupled to an output of the input buffer; an evaluation circuit including an input coupled to an output of the ramp voltage generator, wherein the evaluation circuit includes a first resistor coupled in series with first field effect transistor (FET) between a first voltage rail and a second voltage rail; and an output buffer including an input coupled to a drain of the first FET and an output configured to generate an output voltage.

公开(公告)号：US20240106442A1

公开(公告)日：2024-03-28

申请号：US17934654

申请日：2022-09-23

Applicant: QUALCOMM Incorporated

Inventor： Jianjun YU ,  Yue CHAO ,  Tomas O'SULLIVAN ,  Lai Kan LEUNG

IPC: H03L7/099 ,  H03B5/12 ,  H03K3/0231 ,  H03M1/46

CPC classification number: H03L7/099 ,  H03B5/1293 ,  H03K3/0231 ,  H03M1/46

Abstract: Methods and apparatus for storing a control voltage of a phased-locked loop (PLL) when switching from mission mode to standby mode for the PLL, and for restoring the control voltage of the PLL when switching back to mission mode. An example PLL circuit includes a charge pump, a voltage-controlled oscillator (VCO) having a control input coupled to an output of the charge pump via a node, and a tracking circuit coupled to the node. The tracking circuit is generally configured to sample a voltage of the node during a mission mode, save a representation of the sampled voltage before entering a standby mode, and restore the sampled voltage to the node for reentering the mission mode using the saved representation of the sampled voltage.

公开(公告)号：US20150349712A1

公开(公告)日：2015-12-03

申请号：US14489444

申请日：2014-09-17

Applicant: QUALCOMM Incorporated

Inventor： Tsai-Pi HUNG ,  Gang ZHANG ,  Jae-Hong CHANG ,  Yung-Chung LO ,  Jianjun YU ,  Yuehai JIN

IPC: H03B5/12

CPC classification number: H03B5/1265 ,  H03B5/1212 ,  H03B5/1243

Abstract: Aspects of a reconfigurable varactor array for providing a capacitance to control an output frequency of a voltage-controlled oscillator are provided. The reconfigurable varactor array can be configured to provide a configurable capacitance. The reconfigurable varactor array can include a plurality of varactor cells connected in parallel. The reconfigurable varactor array can also include a control circuit configured to receive a control signal to select the configurable capacitance from the reconfigurable varactor array. The control circuit can include a plurality of switch groups. Each switch group can be separately connected to one varactor cell in the reconfigurable varactor array. The control signal from the control circuit can control operation of each switch group.

Abstract translation: 提供了用于提供电容以控制压控振荡器的输出频率的可重构变容二极管阵列的方面。 可配置变容二极管阵列可以配置为提供可配置的电容。 可重构变容二极管阵列可以包括并联连接的多个变容二极管单元。 可重构变容二极管阵列还可以包括控制电路，其被配置为接收控制信号以从可重构变容二极管阵列中选择可配置电容。 控制电路可以包括多个开关组。 每个开关组可以单独连接到可重新配置的变容二极管阵列中的一个变容二极管单元。 来自控制电路的控制信号可以控制每个开关组的操作。