Abstract:
A semiconductor device and a method of manufacturing a semiconductor device, the device including gate structures on a substrate; source/drain layers on portions of the substrate that are adjacent the gate structures, respectively; first contact plugs contacting upper surfaces of the source/drain layers, respectively; a second contact plug contacting one of the gate structures, a sidewall of the second contact plug being covered by an insulating spacer; and a third contact plug commonly contacting an upper surface of at least one of the gate structures and at least one of the first contact plugs, at least a portion of a sidewall of the third contact plug not being covered by an insulating spacer.
Abstract:
A semiconductor device and a method of manufacturing a semiconductor device, the device including gate structures on a substrate; source/drain layers on portions of the substrate that are adjacent the gate structures, respectively; first contact plugs contacting upper surfaces of the source/drain layers, respectively; a second contact plug contacting one of the gate structures, a sidewall of the second contact plug being covered by an insulating spacer; and a third contact plug commonly contacting an upper surface of at least one of the gate structures and at least one of the first contact plugs, at least a portion of a sidewall of the third contact plug not being covered by an insulating spacer.
Abstract:
A semiconductor device includes a first impurity region, a channel pattern, a second impurity region, a gate structure, a first contact pattern, a second contact pattern and a spacer. The first impurity region may be formed on a substrate. The channel pattern may protrude from an upper surface of the substrate. The second impurity region may be formed on the channel pattern. The gate structure may be formed on a sidewall of the channel pattern and the substrate adjacent to the channel pattern, and the gate structure may include a gate insulation pattern and a gate electrode. The first contact pattern may contact an upper surface of the second impurity region. The second contact pattern may contact a surface of the gate electrode. The spacer may be formed between the first and second contact patterns. The spacer may surround a portion of a sidewall of the second contact pattern, and the spacer may contact a sidewall of each of the first and second contact patterns.
Abstract:
A semiconductor device and a method of manufacturing a semiconductor device, the device including gate structures on a substrate; source/drain layers on portions of the substrate that are adjacent the gate structures, respectively; first contact plugs contacting upper surfaces of the source/drain layers, respectively; a second contact plug contacting one of the gate structures, a sidewall of the second contact plug being covered by an insulating spacer; and a third contact plug commonly contacting an upper surface of at least one of the gate structures and at least one of the first contact plugs, at least a portion of a sidewall of the third contact plug not being covered by an insulating spacer.
Abstract:
A mobile device includes a display driver integrated circuit (DDI), a display panel, and an application processor. The DDI provides an internal synchronization signal based on an internal clock signal as a synchronization signal. The application processor calculates a time offset corresponding to a difference between a real time and the internal synchronization signal, and provides the time offset to the DDI. The DDI calculates a time to be displayed based on the time offset and a current time provided from the application processor, and displays the time to be displayed in the display panel in a self clock display mode.
Abstract:
A mobile device includes a display driver integrated circuit (DDI), a display panel, and an application processor. The DDI provides an internal synchronization signal based on an internal clock signal as a synchronization signal. The application processor calculates a time offset corresponding to a difference between a real time and the internal synchronization signal, and provides the time offset to the DDI. The DDI calculates a time to be displayed based on the time offset and a current time provided from the application processor, and displays the time to be displayed in the display panel in a self clock display mode.
Abstract:
A semiconductor device includes a first impurity region on a substrate; a channel pattern protruding from an upper surface of the substrate, the channel pattern extending in a first direction substantially parallel to the upper surface of the substrate; a second impurity region on the channel pattern, the second impurity region covering an entire upper surface of the channel pattern; a gate structure on a sidewall of the channel pattern and the substrate adjacent to the channel pattern; a first contact pattern on the second impurity region; a second contact pattern that is electrically connected to the gate structure; and a spacer between the first contact pattern and the second contact pattern. The spacer completely surrounds the second contact pattern in plan view, and the first contact pattern partially surrounds the second contact pattern in plan view.
Abstract:
A semiconductor memory device includes a memory cell array including memory cells, a row decoder connected to the memory cell array through first conductive lines, write drivers and sense amplifiers connected to the memory cell array through second conductive lines, a voltage generator that supplies a first voltage to the row decoder and supplies a second voltage to the write drivers and sense amplifiers, and a data buffer that is connected to the write drivers and sense amplifiers and transfers data between the write drivers and sense amplifiers and an external device. At least one of the row decoder, the write drivers and sense amplifiers, the voltage generator, and the data buffer includes a first ferroelectric capacitor to amplify a voltage.
Abstract:
A method of operating an electronic device is provided. The method includes detecting at least two object displayed contiguously, determining a line interval of the at least two objects, and reconfiguring an interval of the at least two objects based on the determined line interval.