Display device and manufacturing method thereof

    公开(公告)号:US10658398B2

    公开(公告)日:2020-05-19

    申请号:US16036985

    申请日:2018-07-17

    Abstract: A display device includes a substrate, a buffer layer on the substrate, a first semiconductor layer of a first transistor on the buffer layer, a first insulating layer disposed on the first semiconductor layer, a first gate electrode of the first transistor on the first insulating layer, a second insulating layer on the first gate electrode, and a second semiconductor layer of a second transistor disposed on the second insulating layer. A difference between a first distance between a lower side of the buffer layer and an upper side of the second insulating layer and a second distance between an upper side of the first semiconductor layer and an upper side of the second insulating layer is 420 to 520 angstroms.

    Display device and method of manufacturing the same

    公开(公告)号:US11957003B2

    公开(公告)日:2024-04-09

    申请号:US17445277

    申请日:2021-08-17

    CPC classification number: H10K59/122 H10K59/124 H10K71/00

    Abstract: A display device includes a planarization layer on a substrate, a plurality of inner banks and a plurality of outer banks arranged on the planarization layer and extending in one direction, a first alignment electrode and a second alignment electrode on the plurality of inner banks and spaced from each other, a light emitting element on the first alignment electrode and the second alignment electrode and located between the first alignment electrode and the second alignment electrode, and a first contact electrode on the first alignment electrode and contacting a first end of the light emitting element, and a second contact electrode on the second alignment electrode and contacting a second end of the light emitting element. The plurality of outer banks are in contact with the plurality of inner banks at the same layer, and are spaced from each other with the plurality of inner banks interposed therebetween.

    DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20230411371A1

    公开(公告)日:2023-12-21

    申请号:US18110101

    申请日:2023-02-15

    CPC classification number: H01L25/167 H01L33/62 H01L27/124

    Abstract: A display device includes a bank layer disposed on a substrate and defining an emission area, a first to sixth alignment electrodes, each disposed on the substrate extending across the emission area, spaced apart from each other, and sequentially arranged in a direction, a first light emitting element disposed between the first alignment electrode and the second alignment electrode in the emission area and emitting first light, a second light emitting element disposed between the third alignment electrode and the fourth alignment electrode in the emission area and emitting second light, and a third light emitting element disposed between the fifth alignment electrode and the sixth alignment electrode in the emission area and emitting third light. Wavelengths of the first light, the second light, and the third light are different from each other.

    Pixel and display device including the same

    公开(公告)号:US10777137B2

    公开(公告)日:2020-09-15

    申请号:US16372296

    申请日:2019-04-01

    Abstract: A pixel including a light emitting element, a first transistor connected between a first node and the light emitting element to control current flowing from a first power supply to a second power supply, a second transistor connected between a data line and the first transistor to be turned on by an ith first scan signal, a third transistor including a P-type TFT connected between the first transistor and the first node to be turned on by the ith first scan signal and, a fourth transistor including an N-type TFT connected between the first node and an initialization power supply line to be turned on by an i−1th scan signal, and a first connection line connected between the third and fourth transistors to electrically connect semiconductor patterns thereof, in which the first connection line is disposed on the third and fourth transistors and contacts the semiconductor patterns thereof.

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