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公开(公告)号:US11621381B2
公开(公告)日:2023-04-04
申请号:US16678106
申请日:2019-11-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Byunghoon Lee , Jamyeong Koo
IPC: H01L33/62 , H01L25/075
Abstract: A micro-LED mounting structure includes a first layer having a conductive pad disposed on a surface thereof, a second layer including a first surface, a second surface opposite the first surface and disposed on the surface of the first layer, and a via-hole extending from the conductive pad of the first layer to the first surface and including a conductive material, and a micro-LED disposed on the first surface of the second layer to be electrically connected with the conductive material included in the via-hole. The via-hole includes a first opening in the first surface of the second layer and in which the conductive material is formed, the conductive material of the first surface provides a conductive area on a portion of the first surface of the second layer, and the conductive area and an area within a specified area of the conductive area define a substantially flat surface.
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公开(公告)号:US12281243B2
公开(公告)日:2025-04-22
申请号:US17884077
申请日:2022-08-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Byungchul Yoo , Byunghoon Lee , Myungjun Kim , Jikang Kim , Jeonghwan Min , Kyoungchae Seo , Changyoung Jeong
IPC: C09J163/00 , B08B3/04 , B08B3/08 , G03F1/22 , G03F1/82
Abstract: An adhesive for an EUV mask includes an epoxy resin composition in an amount of 50 wt % to 80 wt % based on a total weight of the adhesive, the epoxy resin composition including an epoxy resin, a hardener, a toughening agent, a filler, and a curing accelerator, and an inorganic filler in an amount of 20 wt % to 50 wt % based on the total weight of the adhesive, the inorganic filler including one or more of aluminum hydroxide or calcium carbonate.
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公开(公告)号:US12218295B2
公开(公告)日:2025-02-04
申请号:US17456838
申请日:2021-11-29
Inventor: Byunghoon Lee , Taeil Kim , Jamyeong Koo , Juseung Lee
Abstract: Various embodiments of the disclosure disclose a method for manufacturing a micro Light Emitting Diode (LED) display. The disclosed manufacturing method may include coating a face of a substrate including a circuit portion with a first thickness of a polymer adhesive solution containing a plurality of metal particles, attaching an array of micro LED chips on the polymer adhesive solution, physically connecting a connection pad for each of the array of micro LED chips to the metal particles through heating and pressing the attached plurality of micro LED chips to descend through the polymer adhesive solution, and chemically bonding the metal particles to the connection pad and the circuit portion through heating and pressing so that the micro LED chips are electrically connected to the circuit portion. Various other embodiments are also possible.
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公开(公告)号:US12032281B2
公开(公告)日:2024-07-09
申请号:US17889472
申请日:2022-08-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Byunghoon Lee , Jin Goo Park , Tae-Gon Kim , Sanguk Park , Changyoung Jeong , Jinho Ahn , Hyun-tae Kim
CPC classification number: G03F1/82 , B08B7/0028 , B08B11/02 , B08B13/00 , G03F7/70925
Abstract: A pellicle cleaning apparatus includes a stage to support a pellicle, a particle remover above the stage, the particle remover being configured to remove a particle from a first surface of a pellicle, and the particle remover including a cantilever, and an adhesive material on a bottom surface of the cantilever, and a pressure controller adjacent to the stage, the pressure controller being configured to control a pressure of a fluid on a second surface of the pellicle.
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公开(公告)号:US11417627B2
公开(公告)日:2022-08-16
申请号:US16992004
申请日:2020-08-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jamyeong Koo , Sungyong Min , Byunghoon Lee , Changjoon Lee , Changkyu Chung , Youngkyong Jo
IPC: H01L23/00 , H01L25/16 , H01L25/075 , H01L25/00
Abstract: A micro LED display manufacturing method according to various embodiments may include: a first operation of bonding an anisotropic conductive film including a plurality of conductive particles onto one surface of a prepared substrate, the one surface including a circuit part; a second operation of forming a bonding layer on the anisotropic conductive film; a third operation of positioning a plurality of micro LED chips above the bonding layer, the micro LED chips being arranged on a carrier substrate while being spaced a first distance apart from the substrate; a fourth operation of attaching the plurality of micro LED chips onto the bonding layer by means of laser transfer; and a fifth operation of forming a conductive structure for electrically connecting a connection pad to the circuit part through the conductive particles by means of heating and pressurizing.
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公开(公告)号:US20210026249A1
公开(公告)日:2021-01-28
申请号:US16593149
申请日:2019-10-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Byunghoon Lee , Changyoung Jeong , Byunggook Kim , Maenghyo Cho , Muyoung Kim , Junghwan Moon , Sungwoo Park , Hyungwoo Lee , Joonmyung Choi
IPC: G03F7/20 , G05B19/4097 , H01L21/027
Abstract: There are provided a lithography method capable of selecting best resist and a semiconductor device manufacturing method and exposure equipment based on the lithography method. The lithography method includes estimating a shape of a virtual resist pattern based on a multi-scale simulation for resist, forming a test resist pattern by performing exposure on selected resist based on the simulation result, comparing the test resist pattern with the virtual resist pattern, and forming a resist pattern on an object to be patterned by using the resist when an error between the test resist pattern and the virtual resist pattern is in an allowable range.
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公开(公告)号:US12072637B2
公开(公告)日:2024-08-27
申请号:US17971297
申请日:2022-10-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Byunghoon Lee , Changyoung Jeong , Byunggook Kim , Maenghyo Cho , Muyoung Kim , Junghwan Moon , Sungwoo Park , Hyungwoo Lee , Joonmyung Choi
IPC: G03F7/00 , G05B19/4097 , H01L21/027
CPC classification number: G03F7/705 , G05B19/4097 , H01L21/0273 , G05B2219/45028
Abstract: There are provided a lithography method capable of selecting best resist and a semiconductor device manufacturing method and exposure equipment based on the lithography method. The lithography method includes estimating a shape of a virtual resist pattern based on a multi-scale simulation for resist, forming a test resist pattern by performing exposure on selected resist based on the simulation result, comparing the test resist pattern with the virtual resist pattern, and forming a resist pattern on an object to be patterned by using the resist when an error between the test resist pattern and the virtual resist pattern is in an allowable range.
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公开(公告)号:US20240036460A1
公开(公告)日:2024-02-01
申请号:US18186994
申请日:2023-03-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: MUN JA KIM , Seung Hyun Lee , Jae Sun Jung , Byungchul Yoo , Byunghoon Lee , Changyoung Jeong , Deok Hyun Kim , Deok Hyun Cho
IPC: G03F1/62
CPC classification number: G03F1/62
Abstract: Provided herein are protective membranes for lithography that include a core layer including carbon, an interface layer on the core layer, and a protective layer on the interface layer. The interface layer includes a reactive group bonded to a carbon atom of the core layer and the reactive group includes oxygen or nitrogen. The protective layer includes an element “M”, and the element “M” is bonded to the oxygen or nitrogen of the reactive group.
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公开(公告)号:US20230047588A1
公开(公告)日:2023-02-16
申请号:US17971297
申请日:2022-10-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Byunghoon Lee , Changyoung Jeong , Byunggook Kim , Maenghyo Cho , Muyoung Kim , Junghwan Moon , Sungwoo Park , Hyungwoo Lee , Joonmyung Choi
IPC: G03F7/20 , H01L21/027 , G05B19/4097
Abstract: There are provided a lithography method capable of selecting best resist and a semiconductor device manufacturing method and exposure equipment based on the lithography method. The lithography method includes estimating a shape of a virtual resist pattern based on a multi-scale simulation for resist, forming a test resist pattern by performing exposure on selected resist based on the simulation result, comparing the test resist pattern with the virtual resist pattern, and forming a resist pattern on an object to be patterned by using the resist when an error between the test resist pattern and the virtual resist pattern is in an allowable range.
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公开(公告)号:US11493850B2
公开(公告)日:2022-11-08
申请号:US16593149
申请日:2019-10-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Byunghoon Lee , Changyoung Jeong , Byunggook Kim , Maenghyo Cho , Muyoung Kim , Junghwan Moon , Sungwoo Park , Hyungwoo Lee , Joonmyung Choi
IPC: G03F7/20 , H01L21/027 , G05B19/4097
Abstract: There are provided a lithography method capable of selecting best resist and a semiconductor device manufacturing method and exposure equipment based on the lithography method. The lithography method includes estimating a shape of a virtual resist pattern based on a multi-scale simulation for resist, forming a test resist pattern by performing exposure on selected resist based on the simulation result, comparing the test resist pattern with the virtual resist pattern, and forming a resist pattern on an object to be patterned by using the resist when an error between the test resist pattern and the virtual resist pattern is in an allowable range.
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